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Patent US20060158270 - Electronic circuit including at least one first and one second differential ... - Google PatentsSearch Images Maps Play YouTube News Gmail Drive More »Sign inPatentsThe disclosure relates to an electronic circuit including at least one first and one second differential pair each including a plurality of transistors. All the transistors of said first and second differential pair are included in a single well....http://www.google.com/patents/US20060158270?utm_source=gb-gplus-sharePatent US20060158270 - Electronic circuit including at least one first and one second differential pair with the transistors sharing one and the same wellAdvanced Patent SearchPublication numberUS20060158270 A1Publication typeApplicationApplication numberUS 11/311,931Publication dateJul 20, 2006Filing dateDec 19, 2005Priority dateDec 20, 2004Also published asEP1677351A2, US7598819Publication number11311931, 311931, US 2006/0158270 A1, US 2006/158270 A1, US 20060158270 A1, US 20060158270A1, US 2006158270 A1, US 2006158270A1, US-A1-20060158270, US-A1-2006158270, US2006/0158270A1, US2006/158270A1, US20060158270 A1, US20060158270A1, US2006158270 A1, US2006158270A1InventorsStanislas Gibet, Abdellatif Bendraoui, Gilles MercierOriginal AssigneeAtmel Nantes SaExport CitationBiBTeX, EndNote, RefManPatent Citations (7), Referenced by (129), Classifications (8), Legal Events (7) External Links: USPTO, USPTO Assignment, EspacenetElectronic circuit including at least one first and one second differential pair with the transistors sharing one and the same well
FIELD OF THE DISCLOSURE [0001] The field of the disclosure is that of electronic integrated circuits and more particularly that of integrated circuit design. [0002] To be more precise, the disclosure relates to the optimisation of the topology of integrated circuits, and particularly the optimisation of the topology of voltage-controlled oscillators (VCO). BACKGROUND OF THE DISCLOSURE [0003] The function of a voltage-controlled oscillator is to generate a periodic output signal, the frequency of which is a function of a continuous voltage applied to an input. It thus allows periodic signals to be generated, the frequency of which is open to selection. [0004] There are several types of voltage-controlled oscillator. A first example of a VCO is the VCO of the RC type, which is based on loading and unloading a capacitance through a capacitor. [0005] A second example of a VCO is the voltage-controlled differential oscillator, designated hereinafter as a differential VCO. The differential VCO conventionally includes four transistor based differential pairs. [0006] FIG. 1 shows a simplified diagram of a conventional differential VCO 10. The differential VCO includes first 11, second 12, third 13 and fourth 14 amplifying stages. Amplifying stages 11 to 14 are polarised by means of a bias voltage VBIAS applied to an input 15 of the differential VCO 10. Each stage includes two inputs, 111 and 112, 121 and 122, 131 and 132, 141 and 142 respectively, and an output 133, 123, 133 and 143 respectively. [0007] The output 133 of the third stage supplies the periodic output voltage of the differential VCO 10 the frequency of which depends on the bias voltage VBIAS. [0008] FIG. 2A shows the diagram of a conventional amplifying stage of the differential VCO 10, for example the first stage 11. For example, all the stages 11 to 14 of the differential VCO 10 are identical. [0009] This first stage 11 conventionally includes: a conventional differential pair 114 based on two P-type MOS transistors M1, M2; a current source 115 including one P-type MOS transistor M3; and an active load 116 based on two N-type MOS transistors M4, M5. [0013] The inputs 111, 112 of the first stage 11 are connected to the gates of the transistors M1, M2 of the differential pair 114. The output 113 of the first stage 11 is connected to the drain of the transistor M2 of the differential pair 114. [0014] The sources of the transistors M1, M2 of the differential pair 114 are connected to one and the same common node N. [0015] A known technique (shown in FIG. 2B) for increasing the power supply rejection of an amplifying stage 21 is to connect the NWELL wells of the transistors 201, 202 of the differential pair 214 to a common node N. [0016] When designing a differential pair that includes two transistors M1 and M2, each of the transistors of the pair, for example the transistor M1, can conventionally be replaced by two transistors M11, M12 each having a gate width two times smaller and a gate length identical to that of the transistor M1. [0017] FIG. 3 shows the diagram of a differential pair 314 in which each of the transistors has been split so as to form two pairs of transistors M11 and M12, M22 and M21 respectively. FIG. 4 is a diagram of the topology of the transistors M11, M12, M22 and M21 of the differential pair 314 in FIG. 3 in the case of a “crossed pair” arrangement. A number of metal strips (not shown in FIG. 4) allow the electrical connections in FIG. 3 to be made between the different contacts of the transistors. [0018] It may be noted that in this FIG. 4 but also in those that follow, the areas marked by black dots are doped zones in which the transistors are made. [0019] The 4 transistors of the differential pair 314 are equivalent to two transistors forming the pair 314. The “crossed pair” arrangement makes it possible to ensure a good uniformity of dimensions of these two equivalent transistors when the pair is manufactured. [0020] Indeed, any variation in dimension due to the manufacturing process, and any interference that causes parasitic effects in the transistors (noise, temperature variation, etc) is transmitted in the same way to each of these two equivalent transistors. [0021] In fact, a lack of uniformity in respect of the dimensions of the transistors of a differential pair (for example the pair 314 in FIG. 3) generates an offset voltage between the two inputs of the pair (311 and 312) that may well interfere with the operation of an amplifying stage that includes the pair. [0022] Specialists in the manufacture of transistors therefore consider that it is necessary to employ the “crossed pairs” arrangement when manufacturing a differential pair. [0023] Conventionally, in a differential pair arranged as a “crossed pair”, the man skilled in the art combines the four transistors in one and the same well 41 (in FIG. 4). In this way, when a VCO is made based on conventional differential pairs of this kind, each of the pairs is included in a different well. [0024] Unfortunately, a first drawback of this conventional arrangement is that it generates parasitic capacitances (capacitances due to the metal strips connecting the transistors, diffusion capacitance of the transistors, bottom or sidewall capacitance between the wells of the transistors and the substrate, etc) that restrict the performance of the differential VCO, in particular by reducing its oscillation frequency. [0025] VCOs are able to operate in different frequency ranges and to be made according to different technologies, each associated with a pitch that is generally indicated in microns. [0026] The growing need to reduce power consumption and the dimensions of electronic systems based on integrated circuits has led designers of VCOs of this kind to use manufacturing technologies that have an increasingly small pitch. [0027] In this way, for example in order to make a phase locked loop (or PLL) for a USB port according to the USB 2.0 standard, it may be necessary to make VCOs by means of technologies that have a pitch below 0.5 μm and which operate at a frequency of about 480 MHz (for an internal clock of 12 MHz). [0028] One drawback of differential VCOs is, according to the man skilled in the art, that they are unable to operate at significant frequencies (above 300 MHz, in very small-scale technologies, in other words below 0.5 μm). [0029] Indeed, the person skilled in the art considers that, should it be required to make a differential VCO operating at these frequencies from a technology below 0.5 μm, the transistors of the differential pairs of this differential VCO would be too small to ensure good uniformity in the dimensions of the transistors of the VCO despite the use of the “crossed pairs” arrangement. It is for this reason, generally speaking, that VCOs operating at high frequencies (above 300 MHz) and made from very small-scale technologies (below 0.5 μm) are VCOs of the RC type. SUMMARY [0030] An embodiment of the present invention is directed to an electronic circuit that includes at least one first and one second differential pair, each including a plurality of transistors. All the transistors of said first and second differential pairs are included in a single well. [0031] A general principle of an embodiment of the invention is based on the implementation of a plurality of differential pairs brought close together so that their transistors share one and the same well. [0032] An embodiment of the invention is equally applicable to circuits based on differential pairs arranged as “crossed pairs” as it is to circuits based on differential pairs that are not arranged as crossed pairs. [0033] In this way, combining the transistors of the differential pairs in a single well makes it possible to obtain circuits based on differential pairs that have parasitic capacitances, particularly bottom and sidewall capacitances, and an occupied semiconductor surface that are clearly smaller compared with conventional circuits. [0034] In one or more embodiments of the invention, the electronic circuit includes four amplifying stages each including a differential pair, all the transistors of said differential pairs being included in a single well. [0035] At least one of said differential pairs may include first and second transistors, which are P-type MOS transistors, and said first and second transistors may share one and the same single drain. [0036] At least one of said differential pairs may include third and fourth transistors, which are N-type MOS transistors, and said first and second transistors may share one and the same single source. [0037] In this way, an embodiment of the invention counters the prejudices of the person skilled in the art by proposing an electronic circuit based on differential pairs with the transistors of the differential pairs not being arranged as a “crossed pair” and therefore able not to be of uniform dimensions. [0038] For at least one differential pair, for example, a double transistor is implemented, being obtained by means of two transistors that share one and the same drain or one and the same source. [0039] Implementing a double transistor of this kind can make it possible to further reduce the parasitic capacitances and the occupied semiconductor surface in the circuit. [0040] According to an embodiment of the invention, the electronic circuit is manufactured by means of a technology with a pitch below 0.5 μm. [0041] According to an embodiment of the invention, the electronic circuit is a voltage-controlled differential oscillator. [0042] For example, the electronic circuit is designed to operate at a frequency above 300 MHz. [0043] In this way, one or more embodiments of the invention propose a differential VCO operating at frequencies above 300 MHz and made by means of a technology below 0.5 μm. [0044] Other characteristics of one or more embodiments of the invention will emerge more clearly from reading the following description of two embodiments, given by way of simple illustrative and non-restrictive examples and of the appended drawings.
BRIEF DESCRIPTION OF THE DRAWINGS [0045] FIG. 1 shows a simplified diagram of a conventional differential VCO based on four amplifying stages; [0046] FIGS. 2A and 2B show two diagrams of a conventional amplifying stage based on a differential pair of the differential VCO in FIG. 1; [0047] FIG. 3 shows the diagram of a conventional differential pair made from four transistors; [0048] FIG. 4 is a diagram of the topology of the transistors of the differential pair in FIG. 3 in the case of a “crossed pair” arrangement; [0049] FIG. 5 is a diagram of the topology of the transistors of a conventional differential VCO including four differential pairs arranged as “crossed pairs”; [0050] FIG. 6 is a diagram of the topology of the transistors of a differential VCO according to a first embodiment of the invention; [0051] FIG. 7 is a diagram of the topology of the transistors of a differential VCO according to a second embodiment of the invention.
DETAILED DESCRIPTION OF THE ILLUSTRATIVE EMBODIMENTS [0052] The topology of a conventional differential VCO 50 is shown, in relation to FIG. 5, with the transistors arranged as “crossed pairs”. [0053] This VCO 50 includes sixteen P-type MOS transistors 501 to 516, forming first 501, 505, 509, 513, second 502, 506, 510, 514, third 503, 507, 511, 515 and fourth 504, 508, 512, 516 transistors of four differential pairs 51 to 54 (the other components of the VCO 50 are not shown in this FIG. 5). [0054] The four transistors of each of the differential pairs 51 to 54 are manufactured in one and the same well, 571, 572, 573, 574 respectively. [0055] For example, the first transistor 501 of the differential pair 51 of the VCO 50 has a source 5011, a drain 5012 and a gate 5013. [0056] The four differential pairs 51 to 54 occupy a significant semiconductor surface. For example, for transistors 501 to 516 that have a gate width (denoted w5) substantially equal to 4 μm, a total surface occupied by the four differential pairs is obtained that is substantially equal to 280 μm. [0057] A conventional transistor arrangement of this kind for implementing a differential VCO requires the employment of a high number of metal strips in order to establish the electrical connections of the contacts of the transistors needed for the VCO to operate. [0058] In this way, a topology of this kind generates, through the high number of metal strips required, significant parasitic capacitances. [0059] We will consider hereinafter the implementation of differential VCOs through the use of technologies with a pitch below 0.5 μm, and which operate at frequencies above 300 MHz. [0060] A diagram is shown in relation to FIG. 6 of the topology of the transistors of a differential VCO 60 according to a first embodiment of the invention in which the transistors are arranged as “crossed pairs”. [0061] The VCO 60 also includes sixteen P-type MOS transistors 601 to 616, forming first 601, 605, 609, 613, second 602, 606, 610, 614, third 603, 607, 611, 615 and fourth 604, 608, 612, 616 transistors of four differential pairs 61 to 64 (the other components of the VCO 60 are not shown in this FIG. 6). [0062] For example, the first transistor 601 of the differential pair 61 of the VCO 60 has a source 6011, a drain 6012, and a gate 6013. [0063] Unlike the topology of the conventional differential VCO 50 (FIG. 5), in the topology according to this first embodiment of the invention, the four differential pairs 61 to 64 are manufactured in one and the same and single well 67. [0064] In this way, this topology according to the first embodiment of the invention makes it possible to substantially reduce the semiconductor surface occupied by the differential pairs compared with the topology of the conventional differential VCO 50 in FIG. 5. For example, for transistors 601 to 616 that have a gate width (denoted w6) identical to that of the transistors 501 to 516 of the conventional VCO 50 (in other words substantially equal to 5 μm), a total surface occupied by the four differential pairs 61 to 64 is obtained that is substantially equal to 240 μm. [0065] On the other hand, this topology according to the first embodiment of the invention makes it possible to reduce the parasitic capacitances related to the electrical strips compared with the topology of the conventional differential VCO 50. Indeed, it makes it possible to reduce the length (given the fact that the differential pairs 61 to 64 have been brought closer together) of the metal strips needed to establish the electrical connections of the differential VCO 60, and therefore the parasitic capacitances related to these electrical strips. [0066] This topology according to the first embodiment of the invention additionally makes it possible to reduce the parasitic capacitances between the well and the substrate of the transistors 601 to 616. Among these parasitic capacitances, the bottom capacitance can be distinguished from the sidewall capacitance. [0067] Indeed, the bottom CSURF1 and sidewall CPERI1 capacitances, for the four differential pairs 51 to 54 according to the topology of the conventional VCO 50 (implementing 1 well per differential pair) in FIG. 5, may be written: CSURF1=4 H.L.Cjnwell and CPERI1=4.2(H+L).Cjswnwell where H is the height of the wells 571 to 574, L is the length of the wells 571 to 574, Cjjnwell is the drain, source capacitance per unit area/NWELL (expressed as F/m2), Cjswnwell is the drain, source sidewall capacitance/NWELL (expressed as F/m). [0070] For the four differential pairs 61 to 64 according to the topology of the first embodiment of the invention implementing a single well 67 of length 2L and of height 2H, the bottom CSURF2 and sidewall CPERI2 capacitances may be written: CSURF2=4 H.L.Cjnwell and CPERI2=2 (2H+2L).Cjswnwell [0073] For example, Cjnwell=9.55 10−5F/m2 and Cjswnwell=3.65 10−10 F/m. [0074] For example, by taking H=3 μm and L=2 μm, we obtain CSURF1=2.29 fF, CPERI1=14.6 fF, CSURF2=2.29 fF and CPERI2=7.3 fF. [0075] As a consequence, the topology according to the first embodiment of the invention makes it possible to reduce by 50% the parasitic sidewall capacitance compared with the topology of the conventional differential VCO in FIG. 5. [0076] A diagram is presented in relation to FIG. 7 of the topology of the transistors of a differential VCO 70 according to a second embodiment of the invention, in which the transistors are not arranged as “crossed pairs”. [0077] This VCO 70 includes eight P-type MOS transistors 711, 721, 731, 741, 712, 722, 732, 742, forming first 711, 721, 731, 741 and second 712, 722, 732, 742 transistors of four differential pairs 71 to 74 (the other components of the VCO 70 are not shown in this FIG. 7). [0078] The first 711 and second 712 transistors of the differential pair 71 of the VCO 70 each have a source 715, 716 respectively and a gate 717, 718 respectively. [0079] In the same way as in the topology of the differential VCO 60 according to the first embodiment of the invention (FIG. 6), in the topology according to the second embodiment of the invention, the four differential pairs 71 to 74 are manufactured in one and the same and single well 76. [0080] However, unlike the differential VCO 60 in FIG. 6, in which each of the differential pairs, arranged as crossed pairs, includes four transistors, each differential pair 71 to 74 of the differential VCO 70 according to an embodiment of the invention includes only one first 711, 721, 731, 741 and one second 712, 722, 732, 742 transistors. These transistors however have a gate width w7 approximately two times larger (for example w7=10 μm) than those of the transistors of the differential VCO 60. [0081] On the other hand, in each differential pair 71 to 74 of the differential VCO 70, the first 711, 721, 731, 741 and second 712, 722, 732, 742 transistors share one and the same single drain 714, 724, 734, 744 respectively. [0082] In this way, the four differential pairs 71 to 74 of the topology in FIG. 7 occupy a semiconductor surface that is smaller than the four differential pairs arranged according to the topology as “crossed pairs” of the first embodiment of the invention in FIG. 6 (and a fortiori even smaller than the four differential pairs arranged according to the conventional topology in FIG. 5). [0083] Indeed, on the one hand, in each differential pair 71 to 74, in order to share a common drain 714, 724, 734, 744, the first and second transistors are brought closer together in a horizontal direction 75 compared with the “crossed pairs” topology of the first embodiment of the invention in FIG. 6. [0084] And on the other hand, in the differential VCO 70 according to the second embodiment of the invention, each of the transistors of each of the differential pairs, for example the first transistors 711 of pair. 71, is equivalent to two transistors of a differential .pair, for example the first and third transistors 601, 603 of the pair 61, of the VCO 60 according to the first embodiment of the invention in FIG. 6. [0085] In this way, despite the fact that the transistors of the differential VCO 70 according to the second embodiment of the invention have a dual surface compared with those of the “crossed pairs” topology, a saving of inter-transistor surface is achieved in this the differential VCO 70 according to an embodiment of the invention. [0086] For example, for first 711, 721, 731, 741 and second 712, 722, 732, 742 transistors that have a gate width substantially equal to 10 μm, a total surface occupied by the four differential pairs is obtained that is substantially equal to 185 μm, whereas we have a surface of 280 μm in the case of the “crossed pairs” topology in FIG. 6. [0087] Furthermore, compared with the “cross pairs” topology, this topology according to the second embodiment of the invention makes it possible to reduce the number (given the common drains and reduced number of transistors) and the length (given the fact that the transistors have been brought closer together) of the metal strips needed to establish the electrical connections of the differential VCO 70, and therefore the parasitic capacitances related to these electrical strips. [0088] For example, according to the “crossed pairs” topology (FIG. 5 and FIG. 6), it is necessary to make the connections between the first and fourth transistors and between the second and third transistors. In fact, these connections give rise, for each differential pair, to four intersecting metal strips, in other words four intersecting parasitic capacitances of about 1.5 fF each. [0089] In the topology according to the second embodiment of the invention, these connections have no cause to be there, which gives freedom from sixteen intersecting parasitic capacitances of 1.5 fF each compared with the “crossed pairs” topology. [0090] In the next place, this topology according to the second embodiment of the invention makes it possible to reduce the influence of the parasitic diffusion capacitances of the transistors of the differential VCO 70 compared with the parasitic diffusion capacitances of the transistors of the differential VCO 60 according to the first embodiment of the invention; and the conventional differential VCO 50. [0093] Indeed the diffusion capacitance Cdiff1 seen by a source, for the pair of transistors 501 and 503 according to the conventional “crossed pairs” topology in FIG. 5, may be written: Cdiff1=2Cja.a.b+2Cjb. (2a+2b)=2Cja.a.b+Cjb. (4a+4b) [0095] where a is the source length of the transistors 501 and 503, b is the source width of the transistors 501 and 503, Cja is the junction capacitance per unit area (expressed as F/m2), Cjb is the sidewall capacitance per unit length (expressed as F/m). [0096] In the case of the first transistor 711 (the source length of which is substantially equal to 2a and the source width is substantially equal to b) according to the topology of the second embodiment of the invention, the diffusion capacitance CdiffDC2 seen by a source, may be written: Cdiff2=2Cja.a.b+Cjb. (4a+2b)=2Cja.a.b+Cjb. (4a+2b) [0098] For example, Cja=1.28.10−3 F/m2 and Cjb=3.28.10−10 F/m. [0099] In a first example of a transistor that has a relatively significant source length: a=16 μm and b=0.47 μm, we obtain Cdiff1=40.85 fF and Cdiff2=40.55 fF. [0100] In a second example of a transistor that has a relatively small source length: a=1 μm and b=0.47 μm, we get Cdiff1=3.1 fF and Cdiff2=2.8 fF. [0101] As a consequence, in the case of small size transistors, like the one in the aforementioned second example, the topology according to the second embodiment of the invention makes it possible to reduce the diffusion capacitance by 10% compared with the “crossed pairs” topology. [0102] Given that the transistors of the differential VCO in FIG. 7 are not arranged as “crossed pairs” and that they are of small dimensions (for example, of the order of 2 μm for the length of the source and drain diffusion zones and 0.47 μm for their width), these transistors are not generally of uniform dimensions. [0103] This lack of uniformity in respect of the dimensions of the transistors 711, 721, 731, 741, 712, 722, 732, 742 of the differential pairs 71 to 74 generates an offset between the two inputs of each of the pairs 71 to 74. [0104] However, contrary to the opinion of the man skilled in the art, these offsets do not harm the operation of the differential VCO 70, on the contrary, these offsets are an advantage when starting the oscillator. [0105] Generally speaking, differential VCOs use the noise of their power supply for their start-up (the noise is broadband and therefore includes a component that has the right frequency, which is amplified and which initiates the oscillation). [0106] However this start-up process is uncertain and takes time. Indeed, each amplifying stage of the differential VCO 10 in FIG. 1 reacts like a comparator, it is the voltage difference applied to its two differential inputs that allows an output voltage to be generated. In the assembly in FIG. 1, the four amplifying stages 11 to 14 generate instability in the operation of the VCO 10 and therefore an oscillation. [0107] However, there is a risk that each of the inputs of the differential amplifiers may be at the same potential despite the presence of the power supply noise, which corresponds to a VCO rest point and therefore an absence of oscillation. The offsets between the inputs of each of the pairs 61 to 64 allow freedom from this rest point. [0108] A description has been given, in relation to FIGS. 6 and 7, of two differential VCO topologies according to two embodiments of the invention in which only transistors of the PMOS type are employed. It should be noted that the man skilled in the art is also able to employ transistors of the NMOS type in these differential VCOs. [0109] It should be noted that in this case, in each differential pair of the VCO 70 according to the second embodiment of the invention, the first and second transistors share one and the same source and not one and the same drain. [0110] In summary, one or more embodiments of the invention overcome drawbacks of the prior art. [0111] One aspect of an embodiment of the invention provides a differential VCO operating at high frequency and made in a very small-scale technology. [0112] Another aspect of an embodiment of the invention implements a VCO of this kind that is high-performance and that in particular offers a reduction in parasitic capacitances compared with conventional VCOs. [0113] Another aspect of an embodiment of the invention provides a VCO of this kind that requires a reduced number of stages during its manufacture and that occupies a small amount of semiconductor surface. [0114] Yet another aspect of an embodiment of the invention implements a VCO of this kind that is straightforward and inexpensive to manufacture. [0115] Clearly, the invention is not restricted to the embodiment examples mentioned above. [0116] In particular one or more embodiments of the invention also apply to any electronic circuit that includes at least two differential pairs. [0117] In particular, the person skilled in the art will be able to bring any variant into the choice of transistor type. [0118] Although the present invention has been described with reference to one or more embodiments, workers skilled in the art will recognize that changes may be made in form and detail without departing from the spirit and scope of the invention. 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length each forming gate of different transistorUS8198656Jun 12, 2012Tela Innovations, Inc.Integrated circuit including gate electrode level region including at least four linear-shaped conductive structures of equal length having aligned ends and positioned at equal pitch and forming multiple gate electrodes of transistors of different typeUS8207053Sep 25, 2009Jun 26, 2012Tela Innovations, Inc.Electrodes of transistors with at least two linear-shaped conductive structures of different lengthUS8214778Jul 3, 2012Tela Innovations, Inc.Methods for cell phasing and placement in dynamic array architecture and implementation of the sameUS8217428Jul 10, 2012Tela Innovations, Inc.Integrated circuit including gate electrode level region including at least three linear-shaped conductive structures of equal length having aligned ends and positioned at equal pitch and forming multiple gate electrodes of transistors of different typeUS8225239Jul 17, 2012Tela Innovations, Inc.Methods for defining and utilizing sub-resolution features in linear topologyUS8225261Mar 7, 2009Jul 17, 2012Tela Innovations, Inc.Methods for defining contact grid in dynamic array architectureUS8245180Jun 12, 2009Aug 14, 2012Tela Innovations, Inc.Methods for defining and using co-optimized nanopatterns for integrated circuit design and apparatus implementing sameUS8247846Aug 21, 2012Tela Innovations, Inc.Oversized contacts and vias in semiconductor chip defined by linearly constrained topologyUS8253172Aug 28, 2012Tela Innovations, Inc.Semiconductor device with linearly restricted gate level region including four serially connected transistors of first type and four serially connected transistors of second type separated by non-diffusion regionUS8253173Aug 28, 2012Tela Innovations, Inc.Semiconductor device with gate level including four transistors of first type and four transistors of second type separated by non-diffusion region and having at least two gate contacts positioned outside separating non-diffusion regionUS8258547Sep 18, 2009Sep 4, 2012Tela Innovations, Inc.Semiconductor device with linearly restricted gate level region including two transistors of first type and two transistors of second type with offset gate contactsUS8258548Oct 1, 2009Sep 4, 2012Tela Innovations, Inc.Semiconductor device with gate level including four transistors of first type and four transistors of second type separated by non-diffusion region with restricted gate contact placement over separating non-diffusion regionUS8258549Oct 1, 2009Sep 4, 2012Tela Innovations, Inc.Semiconductor device including two transistors of first type having gates formed by conductors of different length respectively aligned with two transistors of second type having gates formed by conductors of different lengthUS8258550Oct 1, 2009Sep 4, 2012Tela Innovations, Inc.Semiconductor device including at least six transistor forming linear shapes including at least two transistor forming linear shapes having different extension distances beyond gate contactUS8258551Sep 4, 2012Tela Innovations, Inc.Semiconductor device with gate level including transistors of first type and transistors of second type with corresponding gate contact placement restrictionUS8258552Oct 1, 2009Sep 4, 2012Tela Innovations, Inc.Semiconductor device including at least six transistor forming linear shapes with at least two transistor forming linear shapes having offset endsUS8258581Apr 2, 2010Sep 4, 2012Tela Innovations, Inc.Integrated circuit including cross-coupled transistors with two transistors of different type formed by same gate level structure and two transistors of different type formed by separate gate level structuresUS8264007Oct 1, 2009Sep 11, 2012Tela Innovations, Inc.Semiconductor device including at least six transistor forming linear shapes including at least two different gate contact connection distancesUS8264008Sep 11, 2012Tela Innovations, Inc.Semiconductor device including transistor forming linear shapes including gate portions and extending portions of different sizeUS8264009Oct 1, 2009Sep 11, 2012Tela Innovations, Inc.Semiconductor device with linearly restricted gate level region including four transistors of first type and four transistors of second type with gate defining shapes of different lengthUS8264044Sep 11, 2012Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having two complementary pairs of co-aligned gate electrodes with offset contacting structures positioned between transistors of different typeUS8264049 *Sep 11, 2012Tela Innovations, Inc.Integrated circuit including cross-coupled transistors with two transistors of different type having gate electrodes formed by common gate level feature with shared diffusion regions on opposite sides of common gate level featureUS8274099Apr 5, 2010Sep 25, 2012Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with gate contact position and offset specificationsUS8283701Jan 14, 2011Oct 9, 2012Tela Innovations, Inc.Semiconductor device with dynamic array sections defined and placed according to manufacturing assurance halosUS8286107Oct 9, 2012Tela Innovations, Inc.Methods and systems for process compensation technique accelerationUS8356268Mar 28, 2011Jan 15, 2013Tela Innovations, Inc.Integrated circuit device including dynamic array section with gate level having linear conductive features on at least three side-by-side lines and uniform line end spacingsUS8395224Apr 2, 2010Mar 12, 2013Tela Innovations, Inc.Linear gate level cross-coupled transistor device with non-overlapping PMOS transistors and non-overlapping NMOS transistors relative to directions of gate electrodesUS8405162Apr 2, 2010Mar 26, 2013Tela Innovations, Inc.Integrated circuit including gate electrode level region including cross-coupled transistors having at least one gate contact located over outer portion of gate electrode level regionUS8405163Mar 26, 2013Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with shared diffusion regions on opposite sides of two-transistor-forming gate level featureUS8436400May 7, 2013Tela Innovations, Inc.Semiconductor device with gate level including gate electrode conductors for transistors of first type and transistors of second type with some gate electrode conductors of different lengthUS8448102May 21, 2013Tela Innovations, Inc.Optimizing layout of irregular structures in regular layout contextUS8453094May 28, 2013Tela Innovations, Inc.Enforcement of semiconductor structure regularity for localized transistors and interconnectUS8471391Apr 12, 2011Jun 25, 2013Tela Innovations, Inc.Methods for multi-wire routing and apparatus implementing sameUS8541879Dec 13, 2007Sep 24, 2013Tela Innovations, Inc.Super-self-aligned contacts and method for making the sameUS8549455Jul 2, 2012Oct 1, 2013Tela Innovations, Inc.Methods for cell phasing and placement in dynamic array architecture and implementation of the sameUS8552508 *Apr 5, 2010Oct 8, 2013Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with shared diffusion regions on opposite sides of two-transistor-forming gate level feature and electrical connection of transistor gates through linear interconnect conductors in single interconnect layerUS8552509Apr 5, 2010Oct 8, 2013Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with other transistors positioned between cross-coupled transistorsUS8558322Apr 5, 2010Oct 15, 2013Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with at least two gate electrodes electrically connected to each other through gate level featureUS8564071Apr 5, 2010Oct 22, 2013Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with at least two different gate level feature extensions beyond contactUS8569841Apr 5, 2010Oct 29, 2013Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with at least one gate level feature extending into adjacent gate level feature layout channelUS8575706Apr 5, 2010Nov 5, 2013Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with at least two different gate level features inner extensions beyond gate electrodeUS8581303Apr 2, 2010Nov 12, 2013Tela Innovations, Inc.Integrated circuit including cross-coupled trasistors having gate electrodes formed within gate level feature layout channels with four inside positioned gate contacts having offset relationships and electrical connection of cross-coupled transistors through same interconnect layerUS8581304Apr 2, 2010Nov 12, 2013Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with four inside positioned gate contacts having offset and aligned relationshipsUS8587034Apr 2, 2010Nov 19, 2013Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with four inside positioned gate contacts and electrical connection of transistor gates through linear interconnect conductors in single interconnect layerUS8592872Aug 17, 2012Nov 26, 2013Tela Innovations, Inc.Integrated circuit including cross-coupled transistors with two transistors of different type having gate electrodes formed by common gate level feature with shared diffusion regions on opposite sides of common gate level featureUS8653857May 5, 2009Feb 18, 2014Tela Innovations, Inc.Circuitry and layouts for XOR and XNOR logicUS8658542May 16, 2012Feb 25, 2014Tela Innovations, Inc.Coarse grid design methods and structuresUS8661392Oct 13, 2010Feb 25, 2014Tela Innovations, Inc.Methods for cell boundary encroachment and layouts implementing the SameUS8667443Mar 3, 2008Mar 4, 2014Tela Innovations, Inc.Integrated circuit cell library for multiple patterningUS8669594Apr 2, 2010Mar 11, 2014Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within at least twelve gate level feature layout channelsUS8669595Apr 5, 2010Mar 11, 2014Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with gate contact position, alignment, and offset specificationsUS8680583Apr 2, 2010Mar 25, 2014Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within at least nine gate level feature layout channelsUS8680626Jul 22, 2011Mar 25, 2014Tela Innovations, Inc.Methods, structures, and designs for self-aligning local interconnects used in integrated circuitsUS8701071May 17, 2013Apr 15, 2014Tela Innovations, Inc.Enforcement of semiconductor structure regularity for localized transistors and interconnectUS8729606Apr 5, 2010May 20, 2014Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channelsUS8729643Mar 15, 2013May 20, 2014Tela Innovations, Inc.Cross-coupled transistor circuit including offset inner gate contactsUS8735944Apr 5, 2010May 27, 2014Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with serially connected transistorsUS8735995Mar 15, 2013May 27, 2014Tela Innovations, Inc.Cross-coupled transistor circuit defined on three gate electrode tracks with diffusion regions of common node on opposing sides of same gate electrode trackUS8742462Apr 5, 2010Jun 3, 2014Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with gate contact position specificationsUS8742463Apr 5, 2010Jun 3, 2014Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with outer positioned gate contactsUS8756551Mar 14, 2011Jun 17, 2014Tela Innovations, Inc.Methods for designing semiconductor device with dynamic array sectionUS8759882Jan 14, 2011Jun 24, 2014Tela Innovations, Inc.Semiconductor device with dynamic array sections defined and placed according to manufacturing assurance halosUS8759985Jun 14, 2013Jun 24, 2014Tela Innovations, Inc.Methods for multi-wire routing and apparatus implementing sameUS8772839Apr 2, 2010Jul 8, 2014Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with four inside positioned gate contacts having offset and aligned relationships and electrical connection of transistor gates through linear interconnect conductors in single interconnect layerUS8785978Apr 2, 2010Jul 22, 2014Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with electrical connection of cross-coupled transistors through same interconnect layerUS8785979Apr 2, 2010Jul 22, 2014Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with two inside positioned gate contacts and two outside positioned gate contacts and electrical connection of cross-coupled transistors through same interconnect layerUS8816402Apr 5, 2010Aug 26, 2014Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with gate level feature layout channel including single transistorUS8823062Mar 14, 2013Sep 2, 2014Tela Innovations, Inc.Integrated circuit with offset line end spacings in linear gate electrode levelUS8835989Apr 5, 2010Sep 16, 2014Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with gate electrode placement specificationsUS8836045Mar 15, 2013Sep 16, 2014Tela Innovations, Inc.Cross-coupled transistor circuit having diffusion regions of common node on opposing sides of same gate electrode trackUS8839175Dec 6, 2011Sep 16, 2014Tela Innovations, Inc.Scalable meta-data objectsUS8847329Mar 15, 2013Sep 30, 2014Tela Innovations, Inc.Cross-coupled transistor circuit defined having diffusion regions of common node on opposing sides of same gate electrode track with at least two non-inner positioned gate contactsUS8847331May 8, 2014Sep 30, 2014Tela Innovations, Inc.Semiconductor chip including region having cross-coupled transistor configuration with offset electrical connection areas on gate electrode forming conductive structures and at least two different inner extension distances of gate electrode forming conductive structuresUS8853793Jan 14, 2013Oct 7, 2014Tela Innovations, Inc.Integrated circuit including gate electrode level region including cross-coupled transistors having gate contacts located over inner portion of gate electrode level region and offset gate level feature line endsUS8853794Apr 1, 2014Oct 7, 2014Tela Innovations, Inc.Integrated circuit within semiconductor chip including cross-coupled transistor configurationUS8863063Mar 15, 2013Oct 14, 2014Tela Innovations, Inc.Finfet transistor circuitUS8866197Apr 5, 2010Oct 21, 2014Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with at least two gate electrodes electrically connected to each other through another transistor forming gate level featureUS8872283Jan 14, 2013Oct 28, 2014Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with shared diffusion regions on opposite sides of two-transistor-forming gate level featureUS8921896Mar 14, 2013Dec 30, 2014Tela Innovations, Inc.Integrated circuit including linear gate electrode structures having different extension distances beyond contactUS8921897Mar 15, 2013Dec 30, 2014Tela Innovations, Inc.Integrated circuit with gate electrode conductive structures having offset endsUS8946781Mar 15, 2013Feb 3, 2015Tela Innovations, Inc.Integrated circuit including gate electrode conductive structures with different extension distances beyond contactUS8951916Sep 23, 2013Feb 10, 2015Tela Innovations, Inc.Super-self-aligned contacts and method for making the sameUS8952425Feb 22, 2013Feb 10, 2015Tela Innovations, Inc.Integrated circuit including at least four linear-shaped conductive structures having extending portions of different lengthUS8966424Sep 27, 2013Feb 24, 2015Tela Innovations, Inc.Methods for cell phasing and placement in dynamic array architecture and implementation of the sameUS9009641Jan 12, 2013Apr 14, 2015Tela Innovations, Inc.Circuits with linear finfet structuresUS9035359Jun 13, 2014May 19, 2015Tela Innovations, Inc.Semiconductor chip including region including linear-shaped conductive structures forming gate electrodes and having electrical connection areas arranged relative to inner region between transistors of different types and associated methodsUS9081931Mar 15, 2013Jul 14, 2015Tela Innovations, Inc.Cross-coupled transistor circuit having diffusion regions of common node on opposing sides of same gate electrode track and gate node connection through single interconnect layerUS9117050Aug 21, 2012Aug 25, 2015Tela Innovations, Inc.Integrated circuit including cross-coupled transistors having gate electrodes formed within gate level feature layout channels with gate contact position and offset specificationsUS9122832Jul 30, 2009Sep 1, 2015Tela Innovations, Inc.Methods for controlling microloading variation in semiconductor wafer layout and fabricationUS9159627Nov 14, 2011Oct 13, 2015Tela Innovations, Inc.Methods for linewidth modification and apparatus implementing the sameUS9202779Mar 17, 2014Dec 1, 2015Tela Innovations, Inc.Enforcement of semiconductor structure regularity for localized transistors and interconnectUS9208279Jun 12, 2014Dec 8, 2015Tela Innovations, Inc.Semiconductor chip including digital logic circuit including linear-shaped conductive structures having electrical connection areas located within inner region between transistors of different type and associated methodsUS9213792Mar 9, 2015Dec 15, 2015Tela Innovations, Inc.Semiconductor chip including digital logic circuit including at least six transistors with some transistors forming cross-coupled transistor configuration and associated methodsUS9230910May 14, 2009Jan 5, 2016Tela Innovations, Inc.Oversized contacts and vias in layout defined by linearly constrained topologyUS9240413Feb 24, 2014Jan 19, 2016Tela Innovations, Inc.Methods, structures, and designs for self-aligning local interconnects used in integrated circuitsUS9245081Sep 3, 2014Jan 26, 2016Tela Innovations, Inc.Semiconductor chip including digital logic circuit including at least nine linear-shaped conductive structures collectively forming gate electrodes of at least six transistors with some transistors forming cross-coupled transistor configuration and associated methodsUS9269702Feb 21, 2014Feb 23, 2016Tela Innovations, Inc.Methods for cell boundary encroachment and layouts implementing the sameUS9281371Dec 10, 2014Mar 8, 2016Tela Innovations, Inc.Super-self-aligned contacts and method for making the sameUS9336344Feb 21, 2014May 10, 2016Tela Innovations, Inc.Coarse grid design methods and structuresUS20080095733 *Sep 25, 2007Apr 24, 2008Griffin James FStructured surfactant systemUS20100237430 *Sep 23, 2010Tela Innovations, Inc.Channelized Gate Level Cross-Coupled Transistor Device with Equal Width PMOS Transistors and Equal Width NMOS TransistorsUS20100252891 *Apr 2, 2010Oct 7, 2010Tela Innovations, Inc.Linear Gate Level Cross-Coupled Transistor Device with Equal Width PMOS Transistors and Equal Width NMOS Transistors* Cited by examinerClassifications U.S. Classification331/57International ClassificationH03K3/03Cooperative ClassificationH01L27/0207, H03F3/45475, H03F3/45179European ClassificationH03F3/45S1K, H01L27/02B2, H03F3/45S1BLegal EventsDateCodeEventDescriptionMar 24, 2006ASAssignmentOwner name: ATMEL NANTES SA, FRANCEFree format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:GIBET, 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If drugs were legalized would the people that were arrested on drug offenses have to be set free. And if so what would be the affect on the economy? : AskRedditjump to contentmy subredditsannouncementsArtAskRedditaskscienceawwblogbookscreepydataisbeautifulDIYDocumentariesEarthPornexplainlikeimfiveFitnessfoodfunnyFuturologygadgetsgamingGetMotivatedgifshistoryIAmAInternetIsBeautifulJokesLifeProTipslistentothismildlyinterestingmoviesMusicnewsnosleepnottheonionOldSchoolCoolpersonalfinancephilosophyphotoshopbattlespicsscienceShowerthoughtsspacesportstelevisiontifutodayilearnedTwoXChromosomesUpliftingNewsvideosworldnewsWritingPromptsedit subscriptionsfront-all-random | gadgets-sports-gaming-pics-worldnews-videos-AskReddit-aww-Music-funny-news-movies-books-history-food-philosophy-television-Jokes-Art-DIY-space-Documentaries-Fitness-askscience-nottheonion-todayilearned-personalfinance-gifs-listentothis-IAmA-TwoXChromosomes-creepy-nosleep-GetMotivated-WritingPrompts-LifeProTips-EarthPorn-explainlikeimfive-Showerthoughts-Futurology-photoshopbattles-mildlyinteresting-dataisbeautiful-tifu-OldSchoolCool-UpliftingNews-InternetIsBeautiful-sciencemore » AskRedditcommentsrelatedwant to join? sign in or create an account in seconds|Englishlimit my search to /r/AskReddituse the following search parameters to narrow your results:subreddit:subredditfind submissions in "subreddit"author:usernamefind submissions by "username"site:example.comfind submissions from "example.com"url:textsearch for "text" in urlselftext:textsearch for "text" in self post contentsself:yes (or self:no)include (or exclude) self postsnsfw:yes (or nsfw:no)include (or exclude) results marked as NSFWe.g. subreddit:aww site:imgur.com dogsee the search faq for details.advanced search: by author, subreddit...this post was submitted on 15 Jan 20131 point (56% upvoted)shortlink: remember mereset passwordloginAsk A New QuestionAskRedditunsubscribesubscribe8,208,450 readers20,459 users here now [ SERIOUS ] The current delay is: - 60 minutes
a community for 7 yearsmessage the moderatorsMODERATORSkrispykrackersjamt9000flyryankarmanautOoerImNotJesusducky-boxcanipaybycheck...and 36 more »012If drugs were legalized would the people that were arrested on drug offenses have to be set free. And if so what would be the affect on the economy? (self.AskReddit)submitted 2 years ago by [deleted]sorry, this has been archived and can no longer be voted on7 commentssharecancelall 7 commentssorted by: besttopnewhotcontroversialoldrandomq&a[–]FloppyTunaFish 0 points1 point2 points 2 years ago (0 children)sorry, this has been archived and can no longer be voted onEx post facto works both ways.
permalink[–]Conchobair 0 points1 point2 points 2 years ago (0 children)sorry, this has been archived and can no longer be voted onNo. permalink[–]tstepanski 0 points1 point2 points 2 years ago (0 children)sorry, this has been archived and can no longer be voted onNew jobs in agriculture, transportation, and sales. Money that previously went untaxed would be taxed (income/regulatory/sales) and the GDP would grow. DEA would become like the ATF of drugs (regulating sales and tax). Much better.
permalink[–]Bored1_at_work 0 points1 point2 points 2 years ago (0 children)sorry, this has been archived and can no longer be voted onNo, they still committed a crime and have received sentences. The appeal process may move quicker but I honestly doubt it. permalink[–]BellaStayFly 0 points1 point2 points 2 years ago (0 children)sorry, this has been archived and can no longer be voted onI wondered that exact question about that state that legalized marijuanna. Does that just mean everyone incarcerated in that state gets out of prison? If so, yippee for them!
permalink[–]MrPoletski 0 points1 point2 points 2 years ago (0 children)sorry, this has been archived and can no longer be voted onOnly if the bill that decriminalises them specifies that. Also, it's unlikely to, because what about people jailed on multiple offenses?
permalink[–]graasias 0 points1 point2 points 2 years ago (0 children)sorry, this has been archived and can no longer be voted onThere would be more people participating in economic growth if they were set free. In addition, jails would no longer have to pay for food/care of the released criminals. Probably a win/win although it depends on the character of the released individuals. permalinkaboutblogaboutteamsource codeadvertisejobshelpsite rulesFAQwikireddiquettetransparencycontact usapps & toolsAlien Blue iOS appreddit AMA appmobile sitebuttons<3reddit goldreddit storeredditgiftsreddit.tvradio redditUse of this site constitutes acceptance of our User Agreement and Privacy Policy. © 2015 reddit inc. All rights reserved.REDDIT and the ALIEN Logo are registered trademarks of reddit inc.create a new accountusername:password:verify password:email: (optional)remember mecreate accountsign inusername:password:remember mereset passwordsign inWe care about your privacy, and we never spam. By creating an account, you agree to reddit's User Agreement and Privacy Policy. We're proud of them, and you should read them.English [en]العربية [ar]Беларуская мова [be]български език [bg]Bosanski [bs]català [ca]česky [cs]dansk [da]Deutsch [de]Ελληνικά [el]English (Australia) [en-au]English (Canadian) [en-ca]English (Great Britain) [en-gb]English [en-us]Esperanto [eo]español [es]español [es-ar]eesti keel [et]Euskara [eu]فارسی [fa]suomi [fi]français [fr]Gàidhlig [gd]עברית [he]मानक हिन्दी [hi]hrvatski [hr]Magyar [hu]Հայերեն լեզու [hy]Bahasa Indonesia [id]íslenska [is] (*)italiano (Italy) [it]日本語 [ja]ಕನ್ನಡ [kn_IN]한국어 [ko]Latin [la]1337 [leet]LOL [lol]lietuvių kalba [lt]latviešu valoda [lv]Nederlands [nl]Nynorsk [nn]Norsk [no]Arrrrrrrr! [pir]polski [pl]português [pt] (*)português [pt-pt]português brasileiro [pt_BR]română [ro]русский [ru]slovenčina [sk]slovenščina [sl]српски језик [sr]Srpski [sr-la]Svenska [sv]தமிழ் [ta]ภาษาไทย [th]Türkçe [tr]українська мова [uk]Tiếng Việt [vi]中文 [zh] (*) incomplete volunteer to translateπ Rendered by PID 15071 on app-140 at 2015-04-02 07:08:28.762250+00:00 running 69466bd country code: US.

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Skip to main contentText only version of this pageAccess keys help HomeExplore the BBCThis page was last updated in June 2004We've left it here for reference.More information19 April 2014Accessibility helpText onlyBBC Homepage»BBC Local
Contact UsLike this page?Send it to a friend! Bob Rudd photographed The World when she came to Falmouth
Click for more pictures --> 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 36 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50
Bob Rudd Leave your responses to the photos you have seen
Geoff Ford from Sydney
Although now travelling up through my 80's, I have been revisiting Cornwall about every 4 or 5 yrs and it always makes my emotions stir when I cross over the border! I have visited or lived in all continents (except Antarctica) and love all the unique features which each bring --- but it is the county of my birth that stirs everything. Yet for all that, my heart really turns over as I fly in over Sydney --- coming back to my home since 1958. Cornish places that epitomise Cornwall --- St Michaels Mount, Coombe on the River Fal, tin mines anywhere, Coverack, Mevagissey, St Ives, Boscastle.
Michael Kirby, Stroud, Gloucestershire
Not been to Cornwall for years, must get there, its only down the road a, a couple of hours away from Gloucestershire. What prompted me to visit this site? I just bought five Brenda Wootton albums,from a local charity shop, all in excellent condition, one appears to be autographed.
may go back someday madron is beautiful
Peter Collins Alice Springs NT Australia
Nostalgia is what Cornwall gives to me
Emilia,Midlands
I have been comming to penzance regurly all 20 years of my life. x
Cherry Wallace Waihi New Zealand
My mother lived in Cornwall when she was about 2 and her family immigrated to New Zealand when she was 6. Her maiden name was Joan Bosworth. Parents names Harry and Elsa. They lived in Perranuthnoe in a cottage named La Blanca. She would love to go for a visit as she has never been back again so I am trying to help her. Maybe there is someone in this village who has guests to stay. She is 83 but very fit. It looks beautiful. Thank you. Ann Smith, St Blazey, Cornwall
I was born in the war in St Dennis, the home of my mother and her family. We later moved to Cheshire, the home of my father, but always spent all my summer holidays with my maternal grandparents in St Dennis, and later my auntie and uncle in Newlyn East and Newquay.My husband and I holidayed down here for several years, and on one particular holiday, on the cliffs above Boscastle, he suggested we started to plan for a move to Cornwall. We have lived here for nearly 2 years and we love it. I have to pinch myself at times to know it's real! Cornwall is the most beautiful place on earth. Imagine the excitement when I bought the St Dennis and Goss Moor book to find several pictures of my mum, uncle, grandmother, godmother and many family friends. What a way to come back to your roots!
John Garfield Hender
My father, whose identical name I bear, was born in the small fishing village of Polruan in the Fowey Harbour.
Dennis L. Tredinnick from New Jersey, U.S.A.
I have never been to Cornwall, but plan to visit next year. I have family still living in the beautiful village along the sea in St. Agnes.I listen to Alex Full's show every Sunday. If there is anyone out there who is a Tredinnick or knows about the family please drop me an email here in America. I am very proud to be Cornish and to know my family came from such a beautiful part of Cornwall, U.K.
Berenice, Cambridge
We used to stay in Polzeath every summer for years, in the 70's and stayed in the flats above the shops which were owned by the Philps family who also owned many of the shops below. I've been back recently to show my husband and was sad to see how much it has changed. Does anyone else have any memories of the flats or of Polzeath as it used to be.
Susie Rogers, Maine,USA
I have travelled to your beloved Cornwall and I absolutely loved the area. The beaches, the countryside, the people-all make me want to come back for another visit.I live in the beautiful state of Maine where our beaches are breathtaking, but there is something about the charm of your country that makes me want more. Until then... Susie Rogers, Readfield, ME USA
I have never been to Cornwall, but I really hope to go there sometime. I listen to Cornwall connected every time I can because it is useful to practice my English and makes me know more about this wonderful place.
Jerry Pullen, Nanoose Bay, British Columbia, Canad
Wishing all Cornishmen and Women wherever they are a very Happy 2005. Thank you Radio Cornwall for the opportunity to keep up with all the news "Back Home"!!
Lee Edward Cornish,Elmira,New York,USA
My great grandfather,Jack Walter Cornish and his family emigrated to the United States in the 1880's.They were Welsh miners,and settled in the state of Pennsyvania and mined coal there.My father,Jack Walter Cornish,often told the family that his father spoke the Cornish language.I would like to learn the Cornish language and would like to correspond with anyone that could help me.
m. gates Lakeville, Indiana 46536
I am looking for a picture by M. Scavel, titled "Support our wildlife,
Averil Williams, Penzance and Newlyn
I have a great interest in Richard Nicholls who sailed to Australia with six others in 1854 on the 36ft fishing boat The Mystery. Are there any descendants in Oz with a similar interest? A plaque has been unveiled in Newlyn this week to their memory.
Renae, Queensland, Australia
I spent many happy years in Cornwall, namely Helston, Port Isaac, Tregony and St. Agnes. My family emigrated to Aust. in 1964 and I have often wondered what has happened to the girls that used to go to Culdrose Air Station for dances. One particular girl I remember very well was Jane, who was at the time smitten with a Sailor called Dave. We lived in Beacon Parc, Helston. I would love to hear from any one who remembers me, my name then was Pat O'Neill, I lived with mum, dad, three sisters, Janet, Jackey and Jane.
Frances Hilary Truscott Kleckner, Pennsylvania
I was born in Lostwithiel to Richard and Muriel Truscott in 1952. In 1955 the whole family immigrated to US. Cornwall will always be my home and I will return to someday heart and soul.God bless the Cornish.
Caroline Skerry, Bodmin Moor
I am writing ,with 3 other teachers a unit called 'Cousin Jack' to teach primary children about the Cornish Diaspora. I am looking for intersting, inspiratinoal, unsusual, heartwarming stories about those who have left Cornwall to seek their fortunes elsewhere(or maybe they hadno chioe. If you have such a story recent or from the past i would love to hear it. *** FROM ALEX FULL *** Hi Caroline, thanks for your mesasge. We'd be interested in talking to you. Please send me an email and we'll get in contact! Thanks. cornwallconnected@bbc.co.uk
I have spent many holidays in Cornwall and always loved it, but after spending 10 months doing voluntary work with National Trust in Cornwall I know it's the only place i want to be. Roll on summer 2006 when i move back, hopefully for good! There's nowhere else quite like it.
Thelma Thomas nee Matthews.. Canada
Averil. (Williams)nee Simons. You made my day! This is truly Cornwall connected. Thank you for responding. Thelma. Henning Staack, Epenw�hrden/Germany
My name is Henning. I live in Dithmarschen, the twinning borough to Restormel/Cornwall. I�m very interested in all things Cornish (incl. Clotted Cream!. Greetings to my friends Paul, Jack, Tasha and Ebby from Newquay!!
Stewart, Caversham, Berkshire
What a wonderful picture if the Mount. I have been holidaying in Cornwall man and boy for 47 years (I am 49!). You can keep all your foreign holidays. Cornwall is beautiful, with just incredible places views. The Cornish people I have always found so hospitable and friendly. My dream is to retire there, but would that break my ideal dream of the place? I don't know, but it is a wonderfully dream!!
Barbara, Birmingham, United Kingdom
I love Cornwall so much, I have been visiting the country (I feel that it's seperate from England)for nearly 30 years now, And never tire of it. It is my dream that one day i would be able to live there, But i am still waiting. Averil Williams - nee Simons, Cornwall
How nice it was to see the message from Thelma Thomas - nee Matthews who left Penzance forCanada in 1947. I remember her well.
John Bray Whitby
Our ancestors are from Delabole, they left Cornwall in 1850 and came to canda to farm. I'm very interested in all things Cornish.
My family (Hammills and Trevennas)left Redruth/Camborne for the U.S. and Canada to work in the mines. The pasties my grandmother used to make were amazing...a real childhood memory. Sad, but even in New York, where you can find every type of food possible I have yet to find a good pasty....
Jewel Cambridgeshire
We've been coming to Cornwall for our to escape the rat race since 1967. It always feels like we're 'coming home!' We were hoping to move here this year but cicumstances have put it on hold at the moment. Will definitely make it soon though........... Peter Williams - "Map Carrek Dhu" - Ponsanooth, Co
I have listened to your programme for the first time for some months. Why, why, why do you play such awful music. There are so many recordings of Cornish Bands, Choirs, Folk Groups, Rock Groups etc. Surely a programme based on Cornwall and its Culture ought to play local music and not 20/30 year old English pop.
Chris Gill (Connor Downs)
Heard you interviewed on our local radio station in Nova Scotia. We live only 30 miles from Truro (the other Truro!) and somewhat further from Falmouth (the other Falmouth). A couple of years ago we much enjoyed hearing the Cornish Youth band who came to play at the Nova Scotia tattoo. They also came to give a concert in Truro (the other Truro)
Thelma Thomas ( Matthews)
Came to Canada from Penzance 1947
Daily I visit "Home" via the computer. I embrace this technology. Sadly there are times it makes me homesick. Kevin Parkinson, Victoria B.C. Canada
I left Delabole in 1961 and emmigrated to Canada in 1973. I spent all my English holidays in Cornwall until I emmigrated. I still have lots of relatives there. Cornwall never leaves my heart; I will be back next year. What has happened to the beautiful Cornish accent? Only my older relatives speak it (their children don't seem to) I know the language is undergoing a revival, but the accent will soon be lost, I chide the young if they are ashamed of their heritage, can you imagine the Irish or Welsh giving up their distinctive brogues?
Mike from Manitoba, Canada
Emigrated from Bodmin in 1978, the beaches of Cornwall were always special especially Polzeath to my family but you cannot mention Cornwall and not think of Bodmin Moor, always enjoyed walking amongst the tors.
Iain in Leicester
Ah yes, Sunday isn't Sunday without Cornwall Connected...
I know I'll be home again one day, but until then I have my memories of the 6am Saturday starts making pasties for John & Ros Eaton at Le Nautique in Fowey, Sunday morning chats with Brenda Wootton and afternoon cream teas at the 'Handy Shop' in Stithians, bluebells in Godolphin woods, the china clay ships up the Fowey estuary and those crazy Saturday nights at 'The Club' in Bread St, Penzance... Emma, Barbados (Launceston)
Been over in Barbados for a year and a half, yes we have the beaches, the sun and the cocktails but would give it up any day to be back home in Kernow, the most beautiful place on earth. Ron Bartle from Berlin Germany (Born "up St. Day."
Hi All how'm be e!? ;)
Stu Hoy/Lichfield UK
Hi Jack, .....re....1 June 2004.........
I lived in 38 Glebe Avenue/Saltash until 1968 then moved away as a young student. I 'think' the person you mentioned still lives in Saltash but has been married for a long time now. Graham S was her brother and the house by Longstone Park. Am still a regular visitor home to my beloved 'Kernow'. Stu Hoy Lichfield UK Sheana, Roccy and Sue(nee Barker) Perth Australia
We emigrated in 1967 from Newquay. Saw the message from Daisy Martin with the brother Ronald Barker. Our father was Ronald and he had a younger sister called Daisy. Would love to hear from any relatives back in Cornwall.
eamon boyd melbourne australia
hi imiss home so much i have lived in ox for 30 years but my hearts is still in kernow.
Betty Shaw nee Ryan Melbourne Australia
Would love a wallpaper of St Michael's Mount, growing up in Newlyn ( penzance) we had a veiw of it from our house. The photo on the top of the page is a good one.
Stevie, St Ives
What a fantastic opportunity to "talk" to my sister. I'm in Conrwall and she's n Canada but for three hours we're together!!
Wade Hylarides Michigan
Seeking a painting by M. Scavel of an old man titled "Happy" with a caption "In two years I'll be out of here" belive it to be a 1977 painting
David Teague in Brisbane, Australia
Great grandfather John Teague migrated in 1877 to Townsville, Queensland. As a miner he looked for work in the booming gold and copper mining industry. Would like to hear from any Truro Teagues. His parents were Richard Teague and Rebecca Burley (formerly) Beer. This was a second marriage for both. I am looking for anything about their first marriages. dteague@dodo.com.au
Rebecca Bulcraig[ formerly Heane]
Just found this website and it has made me feel very homesick.Just moved from Perth to Margaret River and have met a couple of fellow Cornishmen/women!! Hopefully be back this year to catch up with family & friends and get another fix of beautiful scenery and have a decent pasty and some clotted cream !!
Jack Van Tol
My name is Jack Van Tol and I live in the United States in Texas.
I have been looking for a woman that I should have married back in 1962. Her name is/was Carol Stapleton and she lived at 65 Glebe Street in Saltash. I've found out that the house at that address was demolished in 1974. Local long time residents say the don;t know of her whereabouts so I'm hoping that maybe she or someone she knows will see Michael Gale Age 81. Porthleven Cornwall
I just felt that some of my friend around the world who may look at this web sit may like to know that I landed in a Tank on D Day. We were not the first troops to land, we waited for the tide to be full in so that we did not have so far to go up the beach, Unfortunately, I was the first Tank to get off the ship and we fell right into a shell hole, so we had to wait for the tide to go out again. We were almost fully under water, but because of the air intake on the back we were OK.
Michelle Powlesland from Penryn
I moved away from cornwall in 1983, lived in Germany for 10 years then I came back home, moved to Spain for 8 months now I am back in Germany working in an private International School, I miss cornwall very much but I like living in germany. But I am hoping to visit cornwall maybe next year.
Sarah /Darwin Australia (Helston)
Just found Cornwall connected while sufing the BBC news site. A great way to keep in touch with 'woz on' in the county. Always miss Cornwall but not the temperature and NO definitley no carrots in pasties please!!!!!! Dennis Marsh-Adelaide-South Australia
Fond memories of Cornwall. Left for Australia in 1964. Last place of Address was Beaconsfield Place St. Agnes.
i was born in cornwall have lived on the same farm (namely) HIGH BARN FARM my brother lived in perth australia, he is dead now but his family lives there still. if any of them is listening say hello, his name Ronald Barker he always loved cornwall it is the best county in the world if ever i visit australia i will not be able to get back soon enough p.s no carrots in a cornish pasty & always use the correct pasty steak bye for now Pauly in Quebec
So where are they? These pasty recipes?!
Richard, Callington (formerly from Lanner)
I am currently running a company in Antigua, delivering training to the maritime sector. Looking at this site reminds me that Cornwall really is 'God's Country'. I shall be home again for a visit soon - proper job.
Bernard, St Germans, Cornwall
PS Don't forget St George, always supporting Cornwall.
Living here by choice, loving it.
EMMA BARBER !
Thanks for the beautiful photos of scenes from home in Cornwall , they travel well across the Atlantic !
St Michaels Mount is the most magical place in the whole world! It has a power over me thats hard to explain, I have every post card made of the mount, and my home is covered with photographs and paintings of "my favourite place"
Marj and Dennis
At last! We have been listening to Cornwall Connected and have just discovred what a wonderful treasure trove of Cornish goodies you have here. We shall be back!
Mike Bray Camborne
I really like 'Cornwall Connected' great idea. Having visited Oz twice, I am really proud of the way Ozzies have preserved and presented the Cornish contribution to that great country.
No wonder I feel at home there when not in Cornwall.Good on ya Jillian Bennett [Barber]
Just found out about this site from my cousin Emma Barber. We are from Ruan Minor and after years of living in Canada, still feel home-sick for that 'special' place. I'm coming home in May and will have my 65th. birthday in Helston with my brother. Look forward to seeing the rest of the Barbers while I'm there.
St Piran's Day is THE day for all Cornishmen and women all over the globe. Kernow Bys Vyken!
Stevie in Ottawa
Yes, St Pirans Day here too!!
Dennis and Marjorie B in South Australia
Just found your site looking for information about St Piran. Pleased to know he's being remembered. We too "down under" are marking March 5.
Teresa in Penzance
So then all you dedicated Cornish where are your comments for St Pirans Day???? Let's remember the saint of the the land we love.
Fistral? You must be joking mate. Perran's the place - wicked tops and runs.
I listened to Cornwall Connected at the weekend - it was great and keeps me in touch with whats' going on. For me the place that makes Cornwall special is the beach at Fistral. Wicked surf. Come on - vote for Fistral - I wanna see you on here. Paul from Hampshire
Mary says that its St Michaels Mount which sums up Cornwall for her...for me its the Tamar Bridge...that's what makes it special to come to Cornwall...and keeps the rest of the UK at a distance!
Mary says St Michael's Mount. I say Launceston (Lanson please) Castle. Steve, New Forest, Hampshire
It might be St Michael's Mount for Mary which sums up what Cornwall is all about but for me it has to be the Tamar Bridge...that's the bridge that makes Cornwall separate from the rest of the world!
Michael (from Penzance but living and working in L
I just wanted to agree with Mary from Porthleven. To me, St Michael's Mount IS Cornwall - magnificent and mysterious at the same time. The Mount really is the jewel in Cornwall's crown and sometimes I wonder why we do not make more of it! Every time I come home from London (more and more nowadays as the quality of life at home is so much better than that in London) my favourite part of the journey is where the A30 dips around and St Mihael's Mount comes into view - it takes my breath away every time and I know I'm home. Ever since my childhood the Nount has been my "place to go" - be it for a good day out on the Mount itself or just to sit on Marazion beach and simply appreciate "the presence" of the Mount - it's a very powerful presence too! Before anyone thinks I'm some kind of New Age crank - I'm a Business Analyst working at the world HQ of one of the world's biggest banks - it's just that we all need somewhere we can go to get away from it all and I've found my place!!!
Georgi PHILP Sills, Abbotsford, B.C. Canada
I really enjoy listening to Cornwall Connected and learning more about the area. My Father, John PHILP, was from Boscastle and it is all very fascinating for me. I would like to say HI to my Cousin Thelma and her husband, Les Blewett in Bude and to my possible cousin, Sheila and her husband Des in Penryn.
Emma Barber in Quebec
BBC Radio Cornwall Connect is a great treat for those of us far away from home ( Cadgwith )...Thanks !
Hello I am Peter from Cork in Ireland I dont really have any Cornish connecctions except I had a granaunt who spent the last years of her life in St Mawes I got a great interest in Cornwall since I was a teenager I am 47 now and my relative died in1984.I used to listen to Cornwall on the vhf since the 70s when I could hear it I heard the very first programme on R Cornwall 20 1 83. I ve been listening regularly on 630 khz since 2001 Easter Day Reception is very good Reception this winter is better than usual because reception is usually restricted Yours sincerely Peter Matson
Mary from Porthleven
Browsing around the site I came across this stunning picture of the Mount which really sums up what Cornwall means to me. What are the other places that "sum up" our county? What do other people think?
Val, Hobart Tasmania
I love to feel close to the county by baking pasties every weekend. Is it true that you shouldn't have carrots in them?
Tristan, Seattle USA
It's great to be able to keep in touch with Cornwall through Cornwall Connected. I'd love to return home one day. Has it snowed this winter?

value: This website is the BBC's online service. It is a large network of websites including such high-profile sites as BBC News and Sport, the on-demand video and radio services co-branded BBC iPlayer, the children's sites CBBC and CBeebies, and learning services such as Bitesize.


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ENERGEX JUNIOR Handheld Vacuum Skip to main contenteBayShop by categoryShop by categoryEnter your search keywordAll CategoriesAdvanced or register':' style="margin-right:3px">Hi -User-!'.replace(/-User-/,escape(a)))+"")}catch(b){document.write("")}})();Hi (Sign in to bid or buy) Daily Deals Gift Cards Help & Contact Sell My eBayExpand My eBay Summary Bids/Offers Watch list Wish list All lists Purchase history Selling My Collections Followed searches MessagesNotification Back to home page
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