texts: How much is a transformer's secondary floating?

texts:
Consider an isolation transformer with its secondary referenced to ground via a resistance R as in the following picture.

simulate this circuit – Schematic created using CircuitLab

If R is infinite, the output voltage Output1-Output2 will float with respect to Ground. And if R is a short circuit, then that voltage is obviously referenced to ground.

However, what happens in between? Can the "floating offset" be quantified or at least bounded depending on that resistance?

Reason of the question: I'm wondering if a simple high resistance path to ground like this one could protect people from shocks (in series with the person's body) due to single point contact (as far as I'm aware, nothing protects against one finger on output1 and one finger on output2)... But letting it float is a danger as well. I am aware of RCDs, I'm just wondering if it's not a safe alternative, out of curiosity.


texts: Altium Designer: Unconnected hidden power pin not detected by ERC

texts:
In Altium I set power pins to hidden in my component library, but I leave the "Connect to" empty (this is because I do not always connect the power pins to the same nets. Power pins can be connected to VCC, VDD, VEE, 3V3, GND... depending on where the component is used).
I set Unconnected Power pin to report an error in the connection matrix, but at Altium they hid the hidden pins so well that not even their ERC tool can detect they are unconnected! No error is reported during the ERC in the schematic. This is really annoying!
Moving to the PCB, no net is assigned to those power pins. To me those are unconnected power pins (they are defined as type power in the component) and they shall be detected during the ERC. (In fact, non-hidden unconnected power pins are detected by the ERC).

Suppose someone else is taking care of the PCB design... those unconnected pins may remain as such till the board manufacturing phase. Not good at all.

The obvious solution is to fill in the "Connect to" field of the power pins in the schematic. But suppose one forgets that step... The ERC shall detect such oversight!

Trying to make my question clearer:
The Altium manual states:

"For a multi-part component, the power net connections should ideally be assigned through use of Part Zero. For each pin that is required to connect to a power net in this way, simply enable the Hide option, leave the Connect To field blank, and set the Part Number field to 0."

I have followed this procedure. The problem is that there appears to be no way to get the ERC to detect that the "Connect To" field has been left blank in a component placed in a schematic (I mean not in the library).
Setting "Nets with only one pin" to error does not trigger any error for unconnected hidden pins as well. It seems that some ERC rules are not applied to hidden pins.

How can I get the Altium ERC to detect unconnected hidden power pins?


texts: Why the voltage suddenly reduces when thyristors change from forward blocking to conduction mode

texts:
As per the diagram:

v-I characteristics of SCR is a graph of anode current I A on y-axis & anode to cathode Voltage plotted on x-axis v-I characteristics can be split into two parts namely Forward Characteristics & Reverse Characteristics.

Now why does the Vak suddenly drops to Vh during conduction... This is unlike a diode where the voltage remains constant even after avalanche breakdown...

Please can anyone explain this isusue to me!


texts: Electric company supply single-phase or 3-phase?

texts: Does the electrical company generally only supply single-phase in residential areas? i.e.: is 3-phase generally only available in higher use areas? And when 3-phase is supplied, do they have separate lines with single-phase as well?


texts:
I am now reviewing a paper about hardware implementation and it says by cropping the 128*96-pixels from 160*120-pixels, the size of the frame memory (SRAM) can be reduced to 1/10.

I don't get it.

Does anybody know how this works?

(EDITTED)

The image is first downsized to half...
So. 320*240 -> 160*120 -> 128*96


texts:
I'm working to build an avalanche beacon proof-of-concept for a school project. I'm fine taking care of the display, buttons, battery, case, etc. but I'm far from understanding the RF side of things. I'm essentially an industrial design major that happens to enjoy EE as a side hobby. I'm definitely in over my head haha, but even if this isn't successful I hope to get something out of it. I'm very prepared for disappointment ;)
So far, here's some notes I've made:

Existing beacons are using 3 ferrite-core antennas to pick up the direction of the 457 kHz signal signal.
Amplify the input from the antennas
Use a 1MSPS ADC to sample the output from some sort of filter. I've seen several projects using a Chebyshev filter.

After the ADC, I have no idea what to do with the signal. I can only guess that I'll need some sort of DSP to extract the useful bits? Clearly I'm very lost. I would appreciate some steering.


texts: Connecting an IC to LEDs - would I use a transistor?

texts:
I have this breadboard circuit, which is basically a 65C02 CPU that has 16 Address pins. I want to wire these up to LEDs. Below, I've connected them directly, which is likely all kinds of bad (Too much load on the CPU? Resistor needed yes/no?), and I wonder which would be the correct way to connect this.

From my very limited understanding, it appears that using a Transistor is what I'd want - I would supply the actual LED Power from elsewhere, and only use the A0..A15 pins to Switch them on/off. Something like this maybe?

simulate this circuit – Schematic created using CircuitLab

Would this be correct, or is there something else that's usually being done? It seems that digital circuits would use MOSFETs instead of regular NPN transistors, but I've never used either, hence the question.


texts: How to upload code to an Arduino Nano once the custom PCB is designed and ordered

texts:
I am fairly new to electronics and have bummed into a situation.
I was working on a project recently involving an Arduino Nano. Up until now, everything was on a breadboard. I had the flexibility to upload all sorts of code to it.
Last weekend I thought it's getting a bit messy with all the wires and stuff. Let's get a custom PCB of it. I designed it and placed the order with a local vendor.
The thing that I did not consider before placing the order was how to upload the code on the Nano now.
From the Gerber file, I am confident that the PCB which is going to arrive shortly will not have the USB port.
Without the USB port, how will I transfer my code to the PCB?
Did I miss/skip a step during all this where I tell the vendor this code needs to be present on the PCB, or will I still have the option to upload my code?


texts: TriState Connection to Atmega328 and FT232R

texts:
I have a custom circuit board containing an ATMEGA328 and an FT232R for bus interface via the RX/TX pins on the ATMEGA.  I also have an off board serial connection that I would like to access the ATMEGA328.  Basically, I want to be able to specify using either the off board serial interface or the FT232 serial interface to the ATMEGA.  These would never attempt to access the ATMEGA RX/TX pins at the same time.

The solution I came up with was to use a tristate buffer to either connect or disconnect the off board serial connections.  The FT232R is always connected to the ATMEGA328.

Here's the problem. Everything works fine if I don't add the tristate buffer to the board.  As soon as I add the tristate buffer, the ATMEGA heats up and the RX/TX interface to the FT232 becomes inoperable.  This occurs even with the off board RX/TX connections being left floating and with the tristate enable pins pulled high through a 10K resistor (which should set the NL27WZ125 dual tristate buffer outputs to a high Z state).

I figure I am missing something about correct use of the tristate buffer, but I don't know what it is.  When the enable pins are pulled high, the tristate outputs should be in a high impedance state and shouldn't affect the circuit at all.

I have triple checked all on board connections, and again, everything works fine until I physically solder the tristate buffer chip to the board.

Here's a simplified schematic (wish I had enough points to post the actual schematic as a picture).

simulate this circuit – Schematic created using CircuitLab

Here's the initial Eagle Schematic (sorry for the incorrect schematic from earlier):

I also realized that the RX buffer was connected in the wrong direction, so I think it should go this way:

However, I don't see how the initial Eagle Schematic should cause the problem described in the original question.


texts: How to select high frequency rectifier capacitor?

texts:
Can I use aluminium electrolytic capacitor after a full bridge rectifier?

My operation frequency is 200 kHz with output voltage of 100 V.

Based on this paper: "Analysis and Design of Load-Independent Output Current or Output Voltage of a Three-Coil Wireless Power Transfer System", the author has used 940 micro farad output capacitor, which is confusing for me also.

Based on the specifications of the following paper I = 4 A, F = 200 Khz, by assuming Vpp = 1V and using the formula C = I / 2 x f x Vpp, I get C = 10 µF

Please correct me I have miscalculated.

However my calculation  is pretty different as can been seen from the value shown in the mentioned paper. Since this paper is IEEE transaction paper I have decided to trust it and use 940 uF capacitor after full bridge rectifier.

As far as I know film capacitor have very good performance in high frequency application however a big size of DC film capactitor (940 uF) is very costly.

Can I use an electrolytic capacitor instead?

I believe aluminium electrolytic capacitors vary significantly with increasing frequency. I have confusion in selection of polarized filter capacitor.

What other type of capacitor is suitable?


texts:
i have this led, and im not sure what resistor to use to drop the 5v current to an appropriate voltage and produce the appropriate current.
the LED is rated at 200mA, but the data sheet says i should apply 150mA through it. my micro-controller outputs 5v i think, but im not sure as i do not have a multimeter, but i apply 5v to the vcc of the micro-controller.

my questions are:

what resistor should i use with this led? (i got 33 ohms as the
answer, making me thing i dont need a resistor).
if i do need a resistor, would a 1/2 watt rated resistor work? the lowest value i have is 100 ohm, is that close enough?
the data sheet does not explain how to solder the LED- do i just connect the b- and r- points to ground and the b+ and r+ to micro-controller outs, and if i want blue i do low r+ and high b+?

Sorry about the extensive questions, i never had any formal education or experience in this field. thanks!


texts: in what order does a VHDL program run in an FPGA

texts:
I am trying to wrap my head around exactly what goes on in an FPGA when I program it, specifically using VHDL. I know all code outside processes run concurrently but what about processes in different vhdl files in the same project? Does the FPGA only run them in the order in which the designer connects their components in the top level entity? Or do they all run concurrently and I have to make sure they are triggered in sequence?

for example I have written three different VHDL files for a CLOCK, A COMPARATOR and a HEXIDECIMAL DISPLAY. (i've omitted a few files for simplicity) I want it so when the clock triggers the comparator, it does its job and then the result is shown on the display, and I have connected them appropriately.

So will all the components run immediately I switch the FPGA on without waiting for its predecessor to do its job? or do they wait till its their turn/they have a signal coming in? I am unsure of whether I should poll the hexadecimal decimal till it sees a signal coming in (input'event) or if that would be unnecessary.


texts:
Do the vibrations of aircraft engines (or any engine, for that matter) dilute the accuracy of a quartz clock?

I haven't done any kind of research or hypothesis testing, though I believe that the frequencies of both don't necessarilly line up enough to interfere with either waveform.


texts:
Given an inverter of drive strength N (example N=16) and input capacitance 1.6fF, does it mean that it can drive

N times its gate capacitance, i.e. 16*1.6f=25.6 fF, or
N times the unit capacitance, i.e.: Cu=1.6f/16*16 = 1.6fF (essentially again its own gate capacitance).

In terms of CMOS standard libraries, is fanout the same as drive strength?

I would say yes; according to Wikipedia FO=Cload/Cin where the gate under consideration is driven by a gate N (=16x) smaller and drives a gate N (=16x) times larger. In my example, I know that the x16 inverter has Cin=1.6fF. So an x256 inverter should have Cin=16*1.6=25.6fF and hence FO=16 (same as drive strength).

simulate this circuit – Schematic created using CircuitLab

Also, when a standard cell library lists the drive strengths (in terms of x5, x8, x16 etc), does it mean relative to the gates of the same type or relative to an inverter or relative to a unit inverter?


texts: For this particular question, I am wondering if Q1 must be in saturation mode or active? I am aware Q2 must be in saturation but upon trying to solve this circuit  I feel as if I have more unknowns than equations. I would show my work but it does not make sense because I cannot straighten out my thought process. anything help would be appreciated as I feel  I am missing a key fact. thanks!


texts:
I am looking for a way to construct a 1 A, ±15 V split-supply. So far, I've seen a number of designs for split-supplies (http://tangentsoft.net/elec/vgrounds.html), but they are all low current (i.e. 100-300 mA).

My application involves several Mass Flow Controllers that each require a +15 V, 0V, and -15V connection. The data sheet says they draw 300+ mA when in operation (they contain a small heating element).

I attempted two separate solutions using an LM7815 and a LM7915 (one with and without the voltage divider), but they did not work.

Can someone point me in the right direction of an appropriate circuit?


texts: How can "purely" electrical circuits emit sound?

texts: Moving membranes or piezoelectric materials obviously produce sound waves, but how can "purely" electrical circuits such as transformers or DCDC choppers (and others) often have an audible noise? Is the material microscopically expanding and shrinking with the current?


texts: Difference between EMI filter and RFI filter

texts:
I always see EMI filters on power entereing of machines. They have generally circuit something like a below:

The machine that I investigad has noise limitter filter that called RFI filters on internet. I guess it is differential mode filter. Similar filter is below:

My questions are :

I will use EMI filter (common mode filter) at entering of AC power .May I use both filter ?
Is Dif. Mode filter for supressing the harmanics ?
Is Dif. mode filter just for DC lines ?

I need an expert advice for using both filters on same system.


texts: Low cost op-amp with Common-mode input voltage range of 1.125V

texts:
I'm developing a project where an op-amp is configured to bring a input voltage difference ranging from 1.8V to 3V to a output voltage ranging from 3V to 5V. The output of the op-amp will be fed into a ADC input of a MCU. the circuit looks as follows:

simulate this circuit – Schematic created using CircuitLab

Taking following considerations:

The op-amp will be powered in a single supply configuration with a voltage of up to 36V.
In- can range from GND to Vcc-1.8V.
In+ can range from 1.8V to Vcc.
In+ - In- can range from 1.8V to 3V.
The input signal will be really low frequency, there will be hardware and/or software low-pass filtering.

How can I find a op-amp based on it's Common-mode input voltage range?

Am I missing something or making something wrong?

For transistors there is the alltransistors page where you can make a parametric search, I need something like this but for op-amps.

What I have so far is:

At the lower end of the input range I would have In+ = 1.8V and In- = 0V this gives that the common-mode input of the op-amp should be 1.8*20/(12+20)=1.125V.

At the upper end of the range I see plenty of room for the Common-mode input voltage range.

But from the datasheet of a typical UA741 page 6 the Common-mode input voltage range VICR is ±13V in a ±15V test condition. This means that my 1.125V figure is outside it's input range.

An other way to solve this would be to connect R3 to some fixed voltage reference instead of GND and re-think the values of the 4 resistors.
Adding a extra voltage reference would add more components to the board, increase size, cost, power consumption and make it more vulnerable to disturbances.


texts: Is is safe to let my PWM charge my 12V battery at 14.8V?

texts:
I have a 12V battery linked to my solar panels.

In the middle I have a PWM charge controller, that is configured by default to charge the battery if Voltage if lower than 14.8.

At night, battery goes down to ~13.8V. (Which I think is the voltage of the full battery) - with no added voltage from solar panels.

Is it safe ? Does it reduce battery life ? (I have a deep cycle lead battery 80Ah.)

Should I change the PWM default configuration to put 13.8V instead ? Why isn't it 13.8V by default ? Is there some advantages I don't understand when set to 14.8V ?

EDIT : I have a battery Hankook DC24MF and a cheap 15$ PWM 20A.


texts:
What does a PLC read if I have an unconnected input?

I know that I can test it, but I want to know whether there is any default ?


texts: Interfacing a PIC microcontroller to different logic levels

texts:
I'm planning on interfacing a PIC microcontroller to two devices which operate on two different logic levels and I'm wondering what the best way of approaching this is. I'm rather inexperienced in this area and was hoping to get some ideas on the matter and clarify a few points.

The problem is that the logic level for the PIC is TTL logic; 0 = 0v, 1 = 5v and the logic levels for the other two devices are 0 = -6v, 1 = - 6v and 0 = 0v and 1 = 10v.

I was planning on using a max232 to provide a conversion to -10v/10v logic and using a voltage divider on the output to provide the -6v/6v logic. Could this approach cause any potential problems with the signal conditioning?

For interfacing to the 10v logic level I was planning on using the 10v rail created by the max232 and somehow switching this to ground using the PIC. Is this a reasonable solution or is there a more elegant approach? Any pointers or factors I should consider would also be much appreciated!


texts: Reducing 3v supply to run 2.4v laser diode

texts:
I am setting up a laser trip wire system, this question revolves solely around the laser itself.

IMPORTANT: The laser is always on (it will have an on/off switch)

Supply voltage is 3v (2x aa's)

Laser specs are:
Operating voltage - 2.4v
Reverse voltage - 2.3v
Threshold current - 24mA
Operating current - 40mA
Optical power - 10mW

The guy in the shop said 3v would be fine to run the diode, then upon testing he destroyed it, so it's obviously not.

A bit of research has found two main points, 1. You can reduce voltage with a resistor(s), and 2. You can't reduce voltage with a resistor(s).

I found a site which explains how to select two resistors to drop the voltage, but it's not 100% clear as the value of R2 is dependant on knowing the value of R1. This seems to follow a basic 1:4 ratio, i.e. 1k/4k, 10k/40k etc. for the circuit I am using but I need to know what value(s) to use.

Alternatively, a cheap, small, simple method of doing it better is also welcome, but I'd definitely like to understand how to do it with 2 resistors. Being such a small amperage I'm guessing the 2 resistor method won't suffer heat issues etc. like a larger load would do?


texts:
I have a multimeter with a battery test setting in addition to voltage measurement. This is marked 1.5-6V 50 ohm. I have some questions:

is the only difference between the voltage and battery tester increased decreased resistance?
why is the top voltage rating only 6V? should larger batteries be tested with the voltmeter? what would the extra couple hundred mA damage that would not be damaged be higher voltage testing in general?

Having decided to try a 9V battery anyway, I find that weaker (8-8.5V) ones have continually decreasing voltage as long as I hold then multimeter on the terminals. Stronger (~8.9V) batteries do not seem to exhibit this behaviour. I have read that weak batteries sometimes do this and should be disposed of.

does a continually decreasing voltage indicate a weak battery or a damaged meter (or something else)?


texts:
I have opened the PCB of an old device in order to use its LCD screen, the problem is that the pcb indicates no model ID or whatsoever.
I was wondering if someone could give me a hint here of whether it is possible to control what the screen displays.
What I do know about the LCD screen is that it has 28 pins, And I googled the LCD controller model number, it gave me a datasheet of "16-Bit Ultra-Low-Power Microcontroller, 8kB Flash, 256B RAM, Comparator, 96 segment LCD", but that does not help me with the pinout of the screen if I want to connect it to the arduino.

m430f413

I'd be grateful if anyone could help me with this, thanks :)


texts: Reverse engineering: Relay driver design consideration

texts:
While reverse engineering a garden twilight switch I frowned upon the fact that there is no positive feedback for the OPAMP. Rather than that I found a simple top detector D7/C5/R5 to drive the output transistor. When it gets dark very slowly, the output will very likely get very unstable with an ever so slight variation in light. The D/R/C combination will attempt to smoothen that to drive the transistor and in turn the relay.

What would be the design consideration for this set up rather than having a large feedback resistor from OPAMP output to its non-inverting input, effectively introducing a slight  hysteresis.

In other words the question is: Why the peak detector config rather than a hysteresis, what is the advantage of that config?

Maybe good to know is the fact that 24V is derived from a capacitive "power supply", with a 24V zener and a 470µF buffer cap. It is not a "hard" 24V.

simulate this circuit – Schematic created using CircuitLab

HA17358A datasheet
R2 is the relay coil. 1600 ohm / 24V.
SRUDH-SS-124D1 relay datasheet


texts: Set LB1 and LB2 low on Arduino and ATmega

texts:
I have searched for a possibility to objdump microcontrollers. I then have found this post. There it says that LB1 and LB2 can be set to low to prevent the most people to read from it.

My questions is how to and is it possible to set this bits low for an Arduino and for an ATmega which is programmed via an Arduino.


texts: I have a question about the working of an inductor..

texts: The inductor develops magnetic field around it to store the kinetic energy of the electrons into magnetic field, but i don't have a clue why does it opposes the change of current passing through it and how .. i know the Lenz's law but don't know the physics behind that..


texts: "3 phase" Type of winding I am not aware of, help? not wye or delta, maybe eFed up generator?

texts:
I bought a few 30 watt 3 phase motor/generators in supposedly delta configuration from a ali express. the motor did have only 3 wires coming out, plus the manual stating it, I am pretty sure this was supposed to be a delta set up. I opened one up and interestingly there were 10 poles for the magnet, which is already out of phase with what I have known so far to be the optimal range for 3 phase motors to work in, where the magnets hit all the coils of one phase at the same time. But more troubling was when i did a connectivity test between coils, and all interact with each other. with the 3 output wires not touching of course.

Now oddly enough they still manage to generate some electricity which made me wonder, is this some sort of set up that is usually used in the industry? or are they just made wrong? I have yet to take it apart to see if the coils are coiled all in the same direction, or which ones are in which direction, but any insight would be appreciated.


texts: Affine Non Autonomous State Space system

texts:
Normally We all know the state space model of the the form

der(x) = F*x(t)+G*u(t)
y = H*x(t)+J*u(t).

However I came across a state space model which has the following form

der(x) = F*x(t)+G*u(t) + c
y = H*x(t)+J*u(t).

Vector c is a constant matrix with same dimensions as Vector G. Actually this constant matrix was introduced in my Plant as due to the model of a gravity component which is always present and not associated with any of the input. We CANNOT assume c is a disturbance as we precisely know c.

One way i tackled it using the following form

der(x) = A*x(t)+[G c]*[u(t) 1]'
y = C*x(t)+D*u(t).

This made my system look like a two input system with second input as constant 1 and changed my G matrix from G to [G c].

However this technique is a serious problem in my full state feedback control and reference tracking as it does not behave normal. I haven't come across this type of SS models. i have searched a lot and just identified them as Affine Non Autonomous Systems Page 11. However I am unable to find some good resource on the web which deals with these types of systems. Every paper I have read is so much mathematically rigorous that it is beyond my understanding.

is there some control theory established for such systems which deals with control-ability, observe-ability, full state feedback and reference tracking? Has someone come across these types of systems?

I am using Matlab for my simulations and using lsim command.

Thanks


texts:
I am looking at implementing a high side N channel MOSFET driver for some power switching circuitry I am working on. Plenty of great looking driver chips are out there, but they all cost $2.00 per part in small quantities. I am looking to spend less and came across the IRS10752.
The only problem is that the data sheet is a bit sparse when it comes to implementing a driver circuit using the IRS10752. It comes with a typical connection diagram and a simplified internal schematic, but I wanted to get another opinion on what the other parts in the typical application circuit actually do.
I've included an annotated version of the application circuit, the internal circuit, and a link to the data sheet below. I've also included my best guess on what each part actually does.

Best Guesses

D_GD1: ????
C_GD1: bypass capacitor for the IC's power supply
C_GD2: reservoir capacitor for gate drive boost circuitry
R_GD1: timing / current limiting resistor for gate source / sink

https://www.infineon.com/dgdl/irs10752lpbf.pdf?fileId=5546d462533600a40153567308ca276d


texts: FFT of time-compressed signal not outputting correct amplitude spectrum

texts:
Given a signal g(t) <--> G(f), a time-compression g(at) <--> 1/(abs(a)) * G(f/abs(a)), but not with the FFT as I've found out. Performing the FFT on g(a*t) doesn't scale the amplitude of the G(f/abs(a)) spectrum at all. What gives?
Fs=100;
t=-5:1/Fs:5;
y=sin(2*pi*t);

a=4;
g=sin(2*pi*a*t);

m = length(y);
n = pow2(nextpow2(m));
Y = fftshift(fft(y,n));
G = fftshift(fft(g,n));

f0 = (-n/2:n/2-1)*(Fs/n);

figure;
plot(f0, abs(Y)/Fs);

figure;
plot(f0, abs(G)/Fs);

Here's y:

Here's g. It's at 4 Hz, but the amplitude is basically the same as y when it should be 25%. Also, why does the y-axis go up to 5 and not 1? I scaled the abs(fft(y)) and abs(fft(g)) by Fs so shouldn't the max amplitude be 1?


texts:
I currently have a 25 stage voltage doubler circuit
I am using 50 0.1 uF x2 suppression capacitors, 50 1N4007 Diodes, and a 20 Mohm current limiting resistors at the final emitter stage. I am using 120 VAC as the initial input voltage.

I would like to increase my output voltage so I am interested in buying a higher value capacitor.

For example, if I upgrade to a 10 uF capacitor (100 times more powerful than current setup) will I need to change any other components of my circuit (e.g. the diodes)?


texts: I am trying to understand the pin diagram of K81F and found there are 2 sets of sda and scl lines, I2C1 and I2C2. Are these just different lines to interface 2 sets of I2C buses?


texts: How to select shunt resistor value of the below circuit? We can use Ohm's law but I am still a bit confused

texts:
I am very new to hardware development. I am learning all the basics to design a battery management system for electric vehicles in the future.

I would like to know how to select a shunt resistor for my circuit. I have searched in google and got many results. Mainly using Ohm's law but still I am bit confused of choosing a value for shunt resistor for my circuit.

The battery pack I am using is 10s 36v 2.5 ampere hour = 2.5 amperes for one hour.

As per the battery datasheet the maximum current the load can withdraw (discharge) is 2C, so 5 amperesmps for half an hour.

I learned the concept of shunt resistor the value should be small so that it will not affect the load.

I would like to measure the current flowing from the battery to the load so that if it reaches the threshold (5A) I can cut-off the discharge flow. For that I am using a shunt resistor.

I learned the concept of shunt resistor the value should be small so that it will not affect the load,
but I am confused how to select the resistor value for above specifications of my circuit.

I know it is basic, but I am really confused please help me in learning it.


texts: For the below circuit, assuming I add a short circuit between terminals A and B (let's call it Isc), howcome I can't use a KVL equation for the left loop, along with the right loop (IsR1 - IscR2 = 0)?


texts: Ic74154 decoder generate active low o/p i.e for example if input is binary 5 , 4 becomes low.  I want a circuit which will give output when i/p is binary 5 then o/p is low for 0 to 4.It is possible by using very large no. of FET but it is very costly.


texts: Solar powered TP4056 Lipo Charger burning

texts:
My project is to build a porch light which will run on a 3.7V Lipo battery, which is charged via 5V solar panel during the day. It has a PIR sensor and has a set timer to light a large LED  once a person trigers the PIR. The circuit also has a LDR so the light only turns on during the night.

I have used an ATmega328 and already built an initial version running on a 3Cell Lipo and a step down buck converter as per the pictures.

So I have done some research and decided to use a 3.7V single Cell Lipo + TP4056 as the Lipo charger and an MT3608 DC to DC converter to provide 5 volts to the Atmega and the 5V LED.

The problem is when I tried to test the design by putting very small amount of voltage with my bench power supply to the TP4056 (like the Solar panel will in the early hours of the morning) ; I keep frying the unit!. On this test, I have the 3.7V 18650 3400mAh battery connected to the battery port but the load is not connected. I also did not use any diodes on this test.
But when I provide 5V directly there is no issues and the charging starts

1) What could be the reason for the TP4056 to burn? Is it the lipo current leaking to the unit?

2) Is there a better way to provide 5V constantly to a circuit with a lipo and a solar panel setup?

Q U E S T I O N    ----    U P D A T E :

Based on the feedback, Here is more detail on the problem;

As per the picture, I have connected the lipo battery without any load on the TP4056 board and used my bench power supply to power the board.
All is OK when I apply 2 Amps and 5 volts to the board and the lipo starts charging around 480mA's. But when I reduce the amp to 500mA on the bench power supply the board is fried.

This is a standard board that I purchased from e-bay and here is the DataSheet: http://www.haoyuelectronics.com/Attachment/TP4056-modules/TP4056.pdf

Is that a normal behaviour? What am I missing here?

Q U E S T I O N    ----    U P D A T E ----  N U M B E R ----2:

I have tested the TP4056 outside with the actual sollar cells. I connected 2 5.5V ones paralel and received around 500mA curent to the Lipo and the good news is the unit was not fried when it get dark and the solar cells did not provide enough current.
I suspect the issue may be with my bench power supply. It is a buck converter not a linear one but I still dont understand how the TP4056 fries as I crank down the amps.
Any ideas ?

Thanks


texts: Short circuits and equivalent resistances: why does the subcircuit get cut off?

texts:
The circuit is the following:

simulate this circuit – Schematic created using CircuitLab

What is the equivalent resistance seen across Nodes 1 and 2? I am told it is R4 + R5. That means everything to the left is cut out.

1) Why can't current flow from across R3 to the left, into the short wire and bifurcate through the resistors R1 and R2, and back out through R3?

2) Why can't current flow across R3, into the short, and back out through the short?


texts: What is a good higher-voltage alternative to the TI TPS2113A power mux?

texts:
UPDATE: According to the TI datasheet, 6V is absolute max, so I guess I'm ok.

Board: https://www.pololu.com/product/2596

Datasheet: http://www.ti.com/lit/ds/symlink/tps2113a.pdf

NOTE: I'm looking for a breakout board, not a SMD.

I'm building a project that runs on a 5V wall-wart, or if during a power outage, it switches to 4-D cells at 6V. It draws about 1 A of current for 15 seconds per day, otherwise it sips about 50 uA in normal operation.

I bought a TPS2113A breakout from Pololu and was excited to use it, but completely ignored the fact that the max input rating is 5.5V. I don't want to use a power-hungry LM7805 LDO to reduce the voltage, but I haven't found a suitable power mux that can deliver up to 2A. (I also don't want to overdrive it, but maybe that's OK.)

Everything else in my project is OK with 6V.

This seems like a common problem (4x1.5V backup + 5V PSU). Any suggestions? (Besides another SMPS, LDO, Zener, or voltage divider... or are those good ideas?)


texts:
well this is resistor under the microscope. If I read this resistor from A to B direction color code it looks 1,87 ohm 1% tolerance. If I assume that Brown at the B side as a temp. coef. resistor value goes mega ohm rank from here.  Also while I am measuring with multimeter it show that just 16.2 ohm. I suspect resistance blasted
Which is correct and how to read actual value? and can you guess about resistor watt?


texts: Can this active-high scenario be achieved without an external pull down resistor

texts:
If I understand correctly, few microcontrollers offer internal pull down resistors on their input pins but almost all allow for internal pull up resistors to be configured.

Why exactly is that ?

I understand that for a push button scenario, we can implement logic to interpet

0V = ON (button pressed)
5V or disconnected = OFF (button not pressed, internal pull up activated)

But what if the input is coming from an external system that you cannot control where the following logic needs to be implemented

external system is not connected (floating) on the input : should translate to OFF
external system is providing 0V on the input  :  should translate to OFF
external system is providing 5V on the input  :  should translate to ON

In this case you need some kind of active-high setup, but for that the internal pull up gets in the way (as a floating value should not be considered HIGH).

Wouldn't it be useful in such a case to have an internal pull down resistor on the input ?

I could implement this by disabling the internal pull up and use an external pull down resistor by connecting the input to GND via the pulldown.

But can this also be achieved in some way without using an external pull down ?


texts: Modulator gain in DCM mode of Buck converter

texts:
I am referring this document in Fig 19 the modulator gain is calculated by the formula that results i.e 112.73 with Duty cycle in DCM as 44.72m for load 250 Ohm but substituted with 197 gain.

Above image is modulator gain used in for the simulation is not used as theoretical value Amod DCMas shown below.

Can anyone clarify this discrepancy?


texts: Voltage limiter is shutting down completely when tripped

texts:
What the circuit is designed to do

The following circuit is designed to accept a rectified (low frequency) sinewave input of amplitude 0-30V, and filter it through charging a capacitor until its voltage reaches a certain value settable via P1. I want the capacitor to be regulated between [7V;12V] when that happens. I thought that circuit would follow the input when not tripped, and oscillate around 12V (for example) when tripped. I was wrong.

Edit: To make it clearer, I am just trying to rectify a low frequency sinewave and make sure it's high enough to generate 5V. However the amplitude may be higher than the breakdown voltage of the capacitor, hence this protection circuit.

What the circuit does instead

To test the circuit, I've injected DC and increased the voltage until the protection tripped - set arbitrarily at 7V in my test. I was expecting the voltage of the capacitor to be saturated at 7V and stay there, but instead it leaked out quickly (a few seconds) down to ~1.5V and counting. I shut down the power supply and restarted the process, and the capacitor did the exact same thing: follow, then drop.

What's wrong?


texts:
I have a three cable circuit in the kitchen1, I know that one is live, one neutral and one is ground. However, there is no colour2 matching between the standard and the real cables, so I can't use the usual easy way, furthermore, from my brief research on the topic I've found that:

  "...Typically Neutral is connected to earth ground at some point, usually at the breaker box. This pretty much makes earth and neutral very close in voltage. And Hot is always 220V (or the nominal line voltage) measured with reference to Neutral (and earth for that matter)..."

thus, a voltmeter would measure the same values between "hot" and neutral , and "hot" and ground.

How to figure out which is ground and which is neutral?

1. EU - Greece - 220V, 50Hz

2. Real cables colours: grey, brown, white.


texts:
First of all, I am new to this Q/A site. If I am doing anything wrong, please forgive me. I am having some trouble solving this problem:
Given the system of Figure(1), design a PID controller so that the system can operate with a peak time that is third(3 times) that of the uncompensated system at 20% overshoot and with zero steady-state error for a step input.

What I have done so Far:
At first:

Then finding \$ Z_{c} \$:

Now I have to find PD compensated System using this matlab code:

clear all
close all
clc
Gs=zpk([-8 -0.85],[-3 -6 -10],1)
rlocus(Gs)

But the result is frustrating as I am not getting any kind of result here:

Am I missing something here?? What's wrong with my solution up to the point. I have solved it with for 2/3 times and 1/3 times. Both times I was successful but in case of 3 times not getting any result.


texts: Automatically switching from 9V battery to DC wall adapter on insertion

texts:
I have a simple circuit that runs off of a 9V battery. I'm re-designing it so that it can also run off of an external 12V DC source (ie: a wall adapter). I want to design the circuit so that if both the battery and the wall adapter are connected simultaneously, the wall adapter is used, and the battery is effectively disconnected from the circuit.

I've found a few circuits online that might work, but they unfortunately might allow a trickle of current into the battery, and since it could be a non-rechargeable (ie: alkaline) cell, this could be disastrous.

I've considered the using a barrel jack with a normally-closed three-terminal contact configuration, but I'm not quite sure how to start. How would I go about designing such a circuit?


texts:
I have a 0-12V voltage range (Vin) that I need to transform to a 100mV-900mV voltage range (Vout). The 0-12V input is fixed from another system, and my analog circuitry needs the 100mV-900mV for proper operation of the IC to which I must supply this voltage.
I have tried following this guide (Application Report SLOA097 from TI) called Designing Gain and Offset in Thirty Seconds.
I have calculated the linear transformation to be Vout(Vin) = m * Vin + b => Vout(Vin) = 66.66mV * Vin + 100 mV.
This works out fine.
A few discrete values as examples: Vout(0) = 100mV, Vout(3) = 300mV, Vout(6) = 500mV, Vout(9) = 700mV & Vout(12) = 900mV, which maps the input range to the output range perfectly.
My problem comes from the actual implementation of the circuitry.
The TI app note specifies a biased voltage divider and non-inverting amplifier circuit combination for positive m and positive b. My transformation has m = 66.66mV and b = 100 mV, so these are both positive.

Using a seed value of R1 = 10kOhm and a Vref of 3.3V, I calculate R2 = 22kOhm.
Using a seed value of Rf = 10kOhm gives a Rg value of -11kOhm.
I haven't been able to purchase a -11kOhm resistor anywhere :)
I guess the issue arises because my m value is between 0 and 1, i.e. non-inverting but attenuating.
I am looking for circuit implementation suggestions to solve this problem, any recommendations are greatly appreciated.


texts:
I have a situation where it's possible a negative voltage may appear on the power supply rails driving CMOS chips. The negative voltage will be very limited in current, fed through a resistor.

The datasheets of course specify that Vdd should not go below ground by more than 0.3V.

Now of course, if you take the supply negative then the parasitic transistors and diodes begin to conduct - clamping the supply to 0.3-0.7V anyway.

My question is: how much negative current on the supply rails can a CMOS IC be expected to handle without failing or degrading? Would it be in the same sort of order as the clamping diode current for I/O pins (20mA)?

If it can't handle any significant negative current at all, then I'll have to install a schottky diode reverse across the power supply to clamp it below 0.3V.

I have seen numerous designs where there are ordinary silicon diodes across the power supply to protect against reverse bias. This seems to be pointless, since the datasheet says not to exceed 0.3V - not 0.65V. Surely the parasitic structures will conduct before the external silicon diode.


texts: Where am I going wrong with the comparator in MSP430?

texts:
I am getting up-to-speed on the TI MSP430.  I am attempting to write code in C to access the built-in comparator on MSP430G2553.  I've got a simple program for the comparator but I must be doing something wrong and I'm hoping someone can spot my error.

For my setup I have a potentiometer across Vcc and Gnd with the wiper arm going to P1.1.  The comparator is configured to use the internal Vcc/2 reference.  My MSP430 is in the TI Launchpad board and I'm trying to drive the red and green LEDs there based on the state of the comparator.  If the comparator output is low I want the green LED on and the red LED off; vice-versa if the comparator output is high.  I also configured P1.7 to show the contents of the CAOUT register.  My code is here:

#include <msp430.h>
#include <msp430g2553.h>

/* This program is for the Launchpad MSP430 development board.
* There is a potentiometer connected from Vcc to Gnd with the
* wiper arm going to CA1 (P1.1).  When the wiper voltage is
* below the threshold the green LED should be lit.  When it
* exceeds the threshold the red LED should be lit.
*
* For this setup Vcc = 3.53 V
*  reference = Vcc/2 = 1.77 V
*        Vin = 1.76 V and higher: green LED on?
*        Vin = 1.70 V and lower: red LED on?
*
*/

#define GREEN    BIT0
#define RED      BIT6
#define SWITCH   BIT3

int main(void) {
    WDTCTL = WDTPW + WDTHOLD;  // disable watchdog
    P1DIR = GREEN + RED + BIT7;  // P1.0 and P1.6 and P1.7 are outputs
    CACTL2 = P2CA4;  // P1.1 = +comp
    CACTL1 = CARSEL + CAREF_2 + CAON;  //  -comp = 0.5*Vcc; comparator on
    P1SEL = BIT7;  // P1.7 updates based on CAOUT

    unsigned int led_mask = 0;

    while(1){
        led_mask = P1OUT;
        if (CACTL2 & 0x01) {
            led_mask &= ~GREEN;  // green LED off
            led_mask |= RED;     // red LED on
        } else {
            led_mask &= ~RED;    // red LED off
            led_mask |= GREEN;   // green LED on
        }
        P1OUT = led_mask;
    }
}

It compiles and uploads fine but it doesn't behave the way that I intended.  When I provide an input voltage of 2 volts I exceed the threshold and CAOUT goes high (verified on P1.7) as expected.  However my code is turning on LEDs as though CAOUT were low.  Also, if I provide an input voltage of 1.4 volts I'm below the threshold and CAOUT is low (verified on P1.7) as expected.  But my code is turning on LEDs as though CAOUT were high.

Why am I not getting the expected results?


texts:
I have a power adapter for a projector: http://www.aaxatech.com/products/p300_pico_projector.htm

It's spec'ed at 12.0V 3.0A. The cable is 2m and twin 20AWG. It also has a barrel connector 4mm OD, 1.5mm ID and 9mm long.

I cannot find an extension cable or matching adapter with a longer cable.

I need to extend the cable to 5m. Is it best to splice 3m 20AWG in? Or trim the existing cable to the max and splice a ticker 5m cable in?

I worried about voltage drop, damaging the project or adapter. Should I have a concern? What's the best fix? Recommended AWG and length?

Obviously I want to extend the adapter output. I want to have a nice finish and avoid having a mains extension.


texts: differences between solenoid and voice coil

texts: If I replace the movable iron rod of a push/pull solenoid with a movable permanent magnet, does that yield a voice coil or are there any further changes necessary for it to be a voice coil?


texts: What would be the safest method to power a laptop (IdeaPad 510 15isk) from a 14.8v battery pack?

texts:
Looking at my existing power jack and measuring it crudely with a cm ruler it looks like 3mm diameter x 1 cm length.  The laptop bottom and charging adapter both say 20v @ 3.25 A max. What would be the best way to deliver that power and have it remain smooth as the battery pack voltage drops from 16.8v to 11v (fully charged to dead)

It looks like a chinesium boost/buck module would be my best bet once I set the voltage via a multimeter and epoxy the adjustment knob so their is no way it could possibly get turned or rotate its self slowly due to thermal expansion or something.  I do not favor this idea though mostly because of the fact that most of those crappy boards look poorly put together and I highly doubt that the output is very well regulated and I fear that if one of those does break it may send to much or to little voltage to the laptop.

Are their any other options? If the boost/buck is my only option are their any safeguards I could use (besides a fuse ofc)?


texts: Are slew rate frequency and cut off frequency same?

texts:
I am bit confused about the cut off frequency and the max frequency above which the output response starts to distort which is slew rate frequency. Are these two things same?

Cutoff frequency (f) = GBP / Av

Slew Rate Frequency (f) = SR/(2*pi*Vp)

Is cutoff frequency = slew rate frequency?

Thanks


texts: Is the iron loss of an iron core transformer twice the mass of the iron core?

texts:
In a mathematical problem related to transformer loss I've found Iron loss = Mass of iron x 2.

If this is true, then how kg is converted into watts.


texts:
I'm currently in a project which consists of making a bio Impedance meter with the AD5933. This could be a very easy project if I had to use the frequency range (1Hz->100kHz) that give the onboard frequency generator but no. I have to go as high as 1MHz which the AD5933 won't do.
I thought of a solution, which takes the use of the AD9833. This component is a programmable waveform generator that makes me able to output the desired sinewave at the frequency I want.
My solution is to completely get rid of the output of the AD5933 and connect the output of the AD9833 to the implant and still use the impedance meter of the AD5933. I can see in the datasheet that to calculate the impedance, the calculations are independent of the frequency. I just have to "sync" the sent frequency to the received result in the board I will use.
From your experience, is something like that possible, or did I forget to take something into account that forces me to use the onboard wave generator from the AD5933?
Thank you in advance for your responses.


texts: FTDI board shows only one location id on dual channel 2232H

texts:
This is a software question, but I believe people working with this board might have come across this scenario before. I have a FT2232H board that has two channels. I want to program it with an xml file to get the right configuration.

When I connect it to FT Prog, I see only one location Id. I am still able to program the device, but I don't think it gets configured correctly as the ports do not get enumerated correctly (I don't see a COM port and one JTAG, just one JTAG).

When connected on a different computer, it shows up as two location IDs and the xml file programming configured my device correctly, resulting in a JTAG port and a serial COM port.

I am not entirely sure what is happening here, could be related to drivers or something else. Has anyone seen this happen?


texts: Validity of superposition when summing powers from each harmonic

texts:
In Boylestad's Introductory Circuit Analysis 13th edition page 1176, there's an example about working out the total power dissipated by a circuit fed a nonsinusoidal signal. The signal is decomposed into:

DC component: 63.6 V
Fundamental: 70.71 V RMS
Second harmonic: -29.98 V RMS

And the circuit is drawn like below in order to apply superposition.

(Not shown in the drawing above: the phase angle of the second harmonic is then changed to -90 so that all sources have the same polarity)
The current and average power for each component are found like this:

DC component
I0 = 10.6 A
P0 = I02R = (10.6 A)2 (6 Ω) = 674.2 W
Fundamental
I1 = 1.85 A ∠-80.96°
P1 = I12R = (1.85 A)2 (6 Ω) = 20.54 W
Second harmonic
I2 = 0.396 A ∠-174.45°
P2 = I22R = (0.396 A)2 (6 Ω) = 0.941 W

And the total RMS current and total average power are found to be:
Irms =  square root ((10.6 A)2 + (1.85 A)2 + (0.396 A)2) = 10.77 A
PT = Irms2R = (10.77 A)2 (6 Ω) = 695.96 W = P0 + P1 + P2
Why the total average power equals the sum of the powers from each component if the superposition theorem can't be applied to power? I understand PT = Irms2R, what I can't understand is why it's valid to sum P0 + P1 + P2.
(For context: I'm reviewing a few fine points I may have overlooked during EE undergraduation years ago)


texts: How do I understand report published in console tab after simulation in Xlinx?

texts:
The report is :

Started : "Simulate Behavioral Model".

Number of CPUs detected in this system: 2
Turning on mult-threading, number of parallel sub-compilation jobs: 4

Starting static elaboration
Completed static elaboration
Fuse Memory Usage: 65712 KB
Fuse CPU Usage: 311 ms
Time Resolution for simulation is 1ps.
Waiting for 2 sub-compilation(s) to finish...
Compiled 10 Verilog Units
Fuse Memory Usage: 72948 KB
Fuse CPU Usage: 390 ms

ISim simulation engine GUI launched successfully

Process "Simulate Behavioral Model" completed successfully

What is this fuse CPU and Memory usage. Do anyone have any idea about it. I googled but did not get satisfactory things related to it.
Thank You.


texts: I2C master and slave use different power sources

texts:
I have two slaves on the I2C bus. Before, both master and slaves used the same power source (2.8V), and the I2C bus works fine.

Today, I changed the master to another power source (3.3V), keep the two slaves on 2.8V. Two pull up resistor are 4.7kohm, connected to 2.8V. Now my I2C bus doesn't work at all.

Is there anything else I have to do, to make this change? Do I need to change something in my code? I would appreciate any advice.


texts: Eagle - clearance errors and display errors

texts:
I am beginning with eagle, I have not any experience with this program.

Could you please tell me, what does it mean clearance error, overlap error and dimension error. How could I avoid it and remove it from my board ?
In advance thank you for help.


texts: High impedance in current source for Iout=0

texts:
I'm simulating an APS pixel using a DC current source as input of the light source.
The problem: a DC current source delivers power even when there is a high impedance state between its nodes.
I have proposed the following structure to be replaced in the input, however, it sets  V=0  when I=0, and no High-Z.

It is not necessarily wrong in most cases, but it will be desirable a High-Z at the output node-
Additionally, it will add capacitance and leakage currents critical for the APS pixel simulation.
Does anyone have another approach?
Thanks in advance!


texts:
I have made a mistake and I do not have the space on my PCB to add two serial resistors. Is it OK to use only one for two caps?

Simulation looks OK but it only the simulation


texts: Why are flip-flops usually triggered on the rising edge of the clock?

texts:
Usually in digital design, we deal with flip-flops that are triggered on a 0-to-1 clock signal transition (positive-edge triggered) as opposed to on a 1-to-0 transition (negative-edge triggered). I have been aware of this convention since my first studies on sequential circuits, but have not questioned it until now.

Is the choice between positive-edge triggered and negative-edge triggered arbitrary? Or is there a practical reason why positive-edge triggered flip-flops have become dominant?


texts:
I have to subtract two binary numbers, each two bits long.

so the numbers are x0x1 and y0y1. the result z0z1 has to be the absolute value.

At my disposal are: a two bit subtractor (ie it subtracts two numbers of two bits each and puts out two bits which is the result)

I also have a magnitude comparator for two number each two bits.

The magnitude comparator has three outputs:
x > y, x = y, x < y

I also have 4 xor gates.

I figured the best way to approach this problem is to let the subtractor do the subtraction and if y0y1 > x0x1 then swap the inputs to the subtractor.

I'm thinking that I have to somehow use the 4 xor gates and the magnitude comparator to do the switching if the case above is true. but I can't figure out how.


texts: Why would uart connection only work after disconnecting power?

texts:
I am using a Microchip Bluetooth Pictail and a Sparkfun 3.3V USB-to-UART and a Arduino Uno (just for power-5V,gnd and 1 active high signal connected to 3.3V).

When I power the PicTail it outputs "CMD" to Realterm, but won't accept input (like a "H\n" for help). I see the Tx pin light up on the Sparkfun. The weird thing is, when I disconnect the 5V, it works great for like 10 seconds. I know it's running off bypass caps. Has anyone an idea what could be wrong? I checked the regulator output on the PicTail, its 3.3V, like it should be.


texts: Two different expressions for lead compensator?Why?

texts:
I am trying to learn about lead compensators from an online resource,but two different articles of same resource mention different expressions of lead compensator, i have also attached snapshots for both links and highlighted the relevant spots
https://ctms.engin.umich.edu/CTMS/index.php?aux=Extras_Leadlag
https://ctms.engin.umich.edu/CTMS/index.php?example=BallBeam&section=ControlFrequency#5


texts: Voltage-voltage Feedback and common-collector analysis?

texts:
(This question is related to this one here, where I attempted to understand how the discrete component values in a negative feedback amplifier are represented by the closed-loop gain and feedback factor.)
Today, I'm hoping to understand voltage-controlled voltage feedback a little better.  My plan is to begin with a schematic of a common-collector amplifier and use it to define loop gain and feedback factor.  Is this analysis correct?
I'll begin with a block diagram showing the internal amplifier and feedback network:

As I understand it, the signal \$v_s\$ will be significantly reduced by the feedback network \$K\$ enough that there will be a minuscule voltage presented to the amplifier \$A_v\$.  The voltage output will be nearly the same as the signal, but with a lower output impedance and higher current.  Below is the circuit I'm working with:

1. Determining \$v_{in}\$
If I start with a KVL loop on the input side, I get...
\$v_s=v_{in}+v_f\$
Replacing \$v_{f}\$ with an expression including \$R_E\$...
\$v_s=v_{in}+i_ER_E\$, and then replacing \$i_E\$ with a known component value...
\$v_s=v_{in}+(\frac{\beta+1}{\beta})i_bR_E\$, and then replacing \$i_b\$ with \$g_mv_{in}\$...
\$v_s=v_{in}+(\frac{\beta+1}{\beta})g_mv_{in}R_E\$
\$v_s=\frac{v_s}{[1+(\frac{\beta+1}{\beta})g_mR_E]}\$
2. Determining \$v_{out}\$
\$v_{out}\$ is a simpler matter; it is simply dependent on \$R_E\$.
\$v_{out}=i_eR_E\$
\$v_{out}=(\frac{\beta+1}{\beta})i_bR_E\$
\$v_{out}=(\frac{\beta+1}{\beta})g_mv_{in}R_E\$
3. Determining open-loop gain
Open-loop gain is simply the action of the internal amplifier, expressed in terms of \$v_{in}\$ and \$v_{out}\$.
\$A_v = \frac{v_{out}}{v_{in}}\$
\$A_v = \frac{(\frac{\beta+1}{\beta})g_mv_{in}R_E}{v_{in}}\$
\$A_v = \frac{(\beta+1)g_mR_E}{\beta}\approx g_mR_E\$
So, the open-loop gain is fairly simple.
4. Determining closed-loop gain
Closed-loop gain will use the signal voltage instead of \$v_{in}\$, so...
\$A_f=\frac{v_{out}}{v_s}\$
\$A_f = \frac{(\frac{\beta+1}{\beta})g_mv_{in}R_E}{v_{in}[1+(\frac{\beta+1}{\beta})g_mR_E]}\$
cancelling out \$v_{in}\$...
\$A_f = \frac{(\frac{\beta+1}{\beta})g_mR_E}{[1+(\frac{\beta+1}{\beta})g_mR_E]}\approx 1\$
We can approximate this to 1, as the \$\beta\$ expressions and the 1 in the denominator become negligible.
5. Checking against the circuit
Given the circuit values above, we can verify our results.  DC analysis gives a quiescent current of \$3mA\$.  That gives us:
\$g_m=\frac{I_{CQ}}{V_T} = \frac{3mA}{25mV} = 0.12\$
\$A_v = \frac{(\beta+1)g_mR_E}{\beta}\approx g_mR_E\$
\$A_v = \frac{(250+1)0.12*4000}{250}=481.92\$
\$A_f = \frac{(\frac{\beta+1}{\beta})g_mR_E}{[1+(\frac{\beta+1}{\beta})g_mR_E]}\approx 1\$
\$A_f = \frac{(\frac{250+1}{250})0.12*4000}{[1+(\frac{250+1}{250})0.12*4000]}=0.998\$
And what is \$K\$, the feedback factor?  Well, if
\$A_f = \frac{A_v}{1+A_vK}\$, then \$K = \frac{482.92}{481.92}=1.002\$
So, the circuit should change the voltage by a factor of 0.998, a barely-detectable change.  What are the exact voltages \$v_{in}\$ and \$v_f\$?
Assuming a \$v_s=10v\$ input, we would expect:
\$v_{in} = \frac{v_s}{[1+(\frac{\beta+1}{\beta})g_mR_E]}\$
\$v_{in} =\frac{10}{[1+(\frac{250+1}{250})0.12*4000]}=20.7mV\$
And for \$v_{out}\$...
\$v_{out}=(\frac{\beta+1}{\beta})g_mv_{in}R_E\$
\$v_{out}=(\frac{250+1}{250})0.12*0.0207*4000=9.98v\$
6. To summarize
The output voltage is nearly the input voltage, missing by only \$20mV\$.  All of this checks out in simulation, so I ask you ... have I analyzed this correctly?  Thanks!


texts: Op-amps vs common drain amplifier for photodiode integration

texts:
I've been playing around with photodiodes and op-amps lately, and thought it might be fun to construct a really crude camera with a dozen pixels.  I was going to model it on an active-pixel CMOS sensor, which seems conceptually easier than a CCD: each pixel amplifies it's own signal and the pixels are multiplexed to the ADC.

At first, I assumed this would be setup using a transimpedance op-amp at each pixel, because all the literature I can see about photodiode amplification talk about op-amps (in either photoconductive or photovoltaic mode):

But when reading more about how CMOS sensors are actually constructed, it seems that they use a three-transistor configuration (3T) or some derivation.  In this setup, a common drain amplifier is used instead of an op-amp (plus associated circuitry for the reset and multiplexing):

Which seems to work in photovoltaic mode too: (from "Towards Self-powered Cameras"):

I thought perhaps the reason 3T is chosen is because op-amp are "instantaneous", in that the 3T configurations naturally integrate over the exposure time but op-amps require constant polling.  But I realized that switched op-amp integrator would do the same integration job:

So now I'm just confused.  It appears that both 3T and op-amp setups work in both reverse- and zero-biased configurations.  I don't see why you would choose one vs the other

Specific questions:

Is there a specific reason why CMOS sensors use the 3T setup instead of op-amps?

Is it due to physical size (3 transistors is easier to fabricate on an IC than an op-amp)
Is one preferable to the other for noise considerations?  E.g. When using discrete photodiodes, you have space for op-amps which have better noise characteristics so the literature only talks about those?  Whereas ICs dont have luxury of low-noise op-amps?

Are common-drain amplifiers somehow better for longer integration times?  I always see op-amps in reference to high bandwidth applications, which imaging definitely isn't.
If an op-amp could magically be shrunk to a size that can fit in a 3T setup, would that be better?

I guess I'm just trying to figure out why the photodiode literature exclusively talks about op-amps, while it seems every CMOS imaging sensor has some derivation of the 3T configuration.

EDIT:  Perhaps related to my confusion, I'm not quite sure how common drain amplifiers actually amplify since they are just buffering the voltage?  So maybe the 3T configurations aren't doing what I think they are?


texts:
From I2C communication with Si7021 sensor i got 3 bytes as a result.
MS LS and checksum as shown in the manual bellow.
But how do i validate using checksum my MS and LS bytes.
I know that each device has unique condition.
How do i accomplish that?
Thanks.
https://www.silabs.com/documents/public/data-sheets/Si7021-A20.pdf


texts: Wiring a USB device to act as a Serial port

texts:
I'm trying to make a cable that will go from a laptop usb port through an opto-isolator to a 4-pin connector on a circuit board, and I'm trying to communicate via Asynchronous IN/OUT. I have some python code to open the port and read/write. The problem I'm running into on windows (and linux) is that I get an error saying "Device descriptor request failed."

So it's not recognizing the device. I don't know if there's an override I need to do or something I need to wire differently. What should I be doing differently to achieve this?

Thank you!


texts:
This is probably some stupid mistake, but I can't understand what's going on.

I have a Discovery board with STM32L100RC.

The HSI oscillator runs at 16 MHz and is selected as the system clock source, so everything should be running at 16 MHz. AHB prescaller is disabled.

According to the datasheet, the clock is divided by 8 before being sent to systick.

I have SysTick reload configured as 0xFFFFFF (which would give me 1 Hz if SysTick was at 16 MHz). And I am getting 1 Hz SysTick interrupt.

Problem is, that would mean the main clock is running at 128 MHz - certainly not.

What would explain the SysTick frequency I am getting?

Is the datasheet wrong?

For completenes, code used for setting up the clocks:

                ALIGN
RCC_CNF
                PUSH    {LR}
                ; FLASH timing config

                LDR     R0, =FLASH_ACR
                LDR     R1, [R0]
                ORR     R1, R1, #FLASH_ACR_ACC64
                STR     R1, [R0]

                LDR     R1, [R0]
                ORR     R1, R1, #(FLASH_ACR_PRFTEN :OR: FLASH_ACR_LATENCY)
                STR     R1, [R0]

                ; Enable HSI

                LDR     R0, =RCC_CR
                LDR     R1, [R0]
                ORR     R1, R1, #RCC_CR_HSION
                STR     R1, [R0]

                ; Wait for HSIRDY
                ALIGN
NO_HSI_RDY      LDR     R1, [R0]
                TST     R1, #RCC_CR_HSIRDY
                BEQ     NO_HSI_RDY

                ; Select HSI as clock source

                LDR     R0, =RCC_CFGR
                LDR     R1, [R0]
                BIC     R1, R1, #RCC_CFGR_SW
                ORR     R1, R1, #RCC_CFGR_SW_HSI
                STR     R1, [R0]

                POP     {PC}

And my SysTick config code:

                ; Configure SysTick
                LDR     R0, =SysTick_CSR
                LDR     R1, [R0]
                ; use internal clock & enable counting
                ORR     R1, R1, #(SysTick_CSR_ENABLE :OR: SysTick_CSR_CLKSOURCE)
                STR     R1, [R0]

                ; Configure the reload register
                LDR     R1, =0xFFFFFF
                LDR     R0, =SysTick_RELOAD
                STR     R1, [R0]

                ; Enable SysTick interrupt
                LDR     R0, =SysTick_CSR
                LDR     R1, [R0]
                ORR     R1, R1, #(SysTick_CSR_TICKINT)
                STR     R1, [R0]

In the interrupt handler, I'm just toggling a LED.


texts: Transistor: Getting “incorrect” graph for input voltage to output voltage

texts:
I tried drawing the graph of \$v_o\$ vs \$v_i\$ for a bipolar junction transistor. I used the below setup (common emitter:)

By design of how the base is a small part compared to others, \$I_b << I_c\$ and so I take \$I_c \approx I_e\$.
I’m taking this transistor to be equivalent to two diodes, one forward biased and another backward, and matching the graphs pointwise against \$I_c\$ to get graph between \$v_o\$ and \$v_i\$:

I’m getting a graph different from what’s given in my textbook.
Mine:

Textbook & circuit given:

I’m not sure where I’m going wrong.


texts: RGB LEDs in automotive environment with fluctuating voltage

texts: I'm hooking up an Arduino to an automotive power supply which fluctuates between 12 and 14.4 volts. I'm also hooking up RGB LED light strips in this circuit as well, now I'm not afraid of the 14V frying the LEDs, but I do not want the brightness of the LEDs to fluctuate with the voltage. Is there anything I can do to prevent this besides an inefficient 12 V linear regulator?


texts: Component identification: SMD: 120C, F mark

texts:
What is this component? When I search on internet, I get a lot of thermal protection components, but they do not look like this.

I got it as a batch from someone, so I don't know the usage.

The dimensions are 7.5 mm x 5.7mm, it has two legs (one on the other side), which extend to the bottom (thus it must be an SMD component).

(sorry for the white spots, the camera lens was dirty).


texts: Problem controlling a ~9v 7 segment display using NodeMCU (3.3v) gpio and a CD4094 shift register

texts:
I'm new to electronics. I'm a developer.

I've been working to control a 7 seg common cathode ~9v display using a CD4094 shift register and a NodeMCU ESP8266 (3.3v pin out).

I've tried to solve the difference between these voltages (3.3 and ~9) using a common emmiter transistor schema (w/ 2n2222).

I could use the common emmiter as a switch, supplying 9v when the transistor base is powered by 3.3v. But I could not figure out how to use this schema with the data, latch and clock in the shift register.

Is the common emmiter schema a possible solution for this problem?
Is there another solution using few components?

Schematics (CD4094 pin position are random in this drawing):

simulate this circuit – Schematic created using CircuitLab

Datasheets:
CD4094: http://www.ti.com/lit/ds/symlink/cd4094b.pdf
Display: https://www.digchip.com/datasheets/download_datasheet.php?id=210905&part-number=C-4001E

Thank you everybody!


texts: Two of the same resistors have different resistance?

texts:
I am doing some work on the electronics of a guitar and in doing so was testing some old circuitry.

I noticed that there are two resistors each stamped with ‘223’. When checking the resistance of these two components I received the following:

I know one is K and one is M. There is still a variance of nearly 500k between the two. Why?

Is one of the resistors bad?

edit
On closer inspection these may be capacitors


texts: North American Regulations on 433MHz Radio

texts:
I'm considering the RFM69HCW 433MHz transceiver radio for use in some RFID-based equipment that we make in low volume. The RFM69HCW is available in 868MHz or 915Mhz as well but those frequencies are very close to the UHF frequencies that the RFID readers in our equipment use (902 to 928 MHz). I theorize that 433MHz, being very different in frequency from our UHF RFID radios is less likely to interfere (I don't have evidence to support this and would welcome any insight on the validity of my theory).

Assuming 433MHz does pose less of a risk of interference, I've been trying to find information about the regulations on this frequency in North America (we're only concerned with Canada and USA for now). I've seen 433Mhz described as "ITU American amateur with limitations". I can't find any clarification on what that really means and if it also pertains to Canada.

For some context the equipment we're considering it for is built in low volume and operated by our own staff. We don't expect to apply for certifications for it. Our concern is with breaking the law and with causing, or being affected by, interference with other people's radio communications.


texts: carrier suppression in dBc for a particular DSB-SC signal

texts:
A sine wave is applied to a balanced modulator. The peak output envelope power is \$ 1000 \$ times the minimum output envelope power. Then the carrier suppression in dBc will be ______?

My thoughts:
Note: dBc means Decibels(with referenced to carrier)
A.T.P\$ \to \$

here, \$ s_{DSB-SC} (t) = A_m A_c \sin (\omega _m t) \cos (\omega_c t)\$
And it's envelope is given as: \$  A_m A_c \sin (\omega _m t) \$
so instantaneous envelope power \$ = \{ A_m A_c \sin (\omega _m t) \} ^2 \$
$$=A_m^2 A_c^2 \frac{1- \cos (2 \omega _m t)}{2} \dots \dots (1)$$
Therefore peak output envelope power \$ = A_m^2 A_c^2\$ which is attained when \$ \cos (2 \omega _m t) = -1\$ or \$ \omega _m t = \frac{\pi}{2} \$
And minimum output envelope power \$ =0 \$ which is attained when \$ \cos (2 \omega _m t) = 1\$ or \$ \omega _m t = \pi \$
Now, $$P_{out \_ p}=1000 \times P_{out \_ min} \quad \quad [Given]$$
$$\implies A_m^2 A_c^2=0$$
Thus not getting any information about carrier suppression in dBc
so any help please...
Answer given is \$ 30 dBc \$


texts:
Question)
The normal element of charge density of surface of conductor is ax + ay + az(sum of unit vectors).
What is charge density? The permittivity of electric field around surface of conductor is ε.
Answer)
En = √3
Ps = Dn = εEn = √3
Can anyone explain this? I have checked all pages of my study material, and I can't find basic law of this?


texts:
I have a consumer device (More specifically a Pioneer P99RS car audio head unit) that I need to operate remotely, with the front panel about 3 meters away from the main unit. The front panel connects to the main unit through an 18 way 1mm pitch FFC cable. What I need to do is extend this FFC cable from its original 8cm to about 3 metres. I'm fairly certain data loss won't be a problem since (as far as I understand) communication is just a few low speed serial interfaces.

The FFC cable is soldered onto the front panel but is detachable from the main unit, thus I'm thinking the easiest thing to do would be just using some sort of a breakout board in each end, connecting one of the boards directly to the front panel, the other board to the main unit through a new FFC cable, and interconnecting the two boards with CAT5/6 cables. Does that sound reasonable to you guys, or are there better ways?

Where can I find breakout boards (Or other viable solutions!) for 18way 1mm ffcs? I found a few forum links etc but they're all old and mostly dead.


texts:
I have an STM32 chip with a 12MHz crystal connected to it (as seen in the figure below.) I've been advised to place a 220 ohms resistor 'in the OSC_OUT connection'.
I know it has to do with the termination resistance but I'd then expect it to be placed between the crystal output and the capacitor to the ground rather than in the connection between the crystal and the STM.
Could you explain to my why 220 ohms is a good value? I've found suggestions of for instance 33 ohms elsewhere (also by the book of Ott. )
Where should it be located exactly and why?
And maybe a very dumb question, but what's the difference between the left and right output of the crystal?


texts: Relay output from MCU with enhanced safety level

texts:
I want to do a relays output with enhanced safety level (redundancy and EDM).

For that, I plan to use two force-guided relays driven each by N-channel MOSFETs.
However, I'm wondering if I can use only one MCU outputs to drive these two MOSFETs or if I should use one MCU output by MOSFET.

Can I assume the MCU transistor output will never be shorted when used to drive MOSFET ? Or should I use two MCU outputs (one per MOSFET).

Here is my schematics :

Relay1 is the MCU output
Relay_1_EDM is connected to MCU input and is used for External Device Monitoring
START_STOP_COM and START_STOP are the relay output with enhanced safety level

EDIT :

This device is intended to be used on a crane.

Currently, this crane works with a button box without any safety at all (except limit switches).
It has a power line contactor driven by a start button with self-maintain and a stop button
Each motor has its contactor. There is any E-stop, external monitoring on contactor or safety device.

Crane schematic can be viewed below :

My work is to replace the button box by a radio remote.

In order to have a safe communication between RF remote and station, the station MCU will send a heartbeat with nonce (autoincrement byte) and the remote MCU should reply to this heartbeat with the right nonce value within a timeout delay.
In case of problem, the station MCU will stop the crane by acting on the power line contactor (On the schematic above, START_STOP will be connected to terminal 3 and START_STOP_COM to terminal 1 which is connected to P power line contactor coil).

This is why I need this output with enhanced safety level.

For now, I think the redundant force-guided relays output with EDM and, as proposed by Dan, driven with two charge pump (one for each relay) and two MCU outputs would be a good solution.
I would also include the crane power line contactor monitoring into the EDM.


texts: LiPo battery charging circuit design (12V LiPo batteries at-least 7AH)

texts: I need a circuit to charge and get charging capacity values for the battery. The battery is 12V LiPo around 7AH. I am looking for a reference design . The input voltage will be around 15-18V DC


texts:
On my board, I am using bidirectional TVS diodes for transient protection. In the schematic, the diodes are configured in bidirectional method so cathode/anode (D1) then anode/cathode (D2). During soldering, I accidentally soldered D2 the opposite way which resulted in the schematic shown.

When I powered on the board using a +5V DC supply, the power supply shorted. Even with D2 flipped, I don't understand why the supply would short as the reverse breakdown voltage is a lot higher than +5V. Flipping D2 of course fixed the problem. I am just curious as to what was the reason for the short?

simulate this circuit – Schematic created using CircuitLab


texts:
I'm pondering over a stackup for a 6-layer board using a couple of PCIe connected ICs.

My first idea was to use the following Stackup:

Signal
GND
Power (Multiple power supplies, so it's a split plane)
Signal
GND
Signal

So the outer layers would have a good solid groundplane, instead of having a split-powerplane as reference-plane for my PCIe-Signals. Also there will be some decoupling between layer 2 and 3.

Now I've seen that the "normal" stackup suggested is:

Signal
GND
Signal
Signal
Power
Signal

Whats your opinion on this?


texts:
This might have a dumb answer, but here goes...

This is a picture of the u.fl connector on the Adafruit ultimate GPS.

With RF lines, I know you want the shortest return path.  So why did they put the ground vias so far away?  Wouldn't it be better to put the vias in the pad?

Thanks!!!


texts:
I have a scope connected to my canH line and  ground and noticed there is some distortion on the waveform in my setup.

Setup:

PCAN-USB device
(https://www.peak-system.com/produktcd/Pdf/English/PCAN-USB_UserMan_eng.pdf)
a DB9 breakout box (https://www.amazon.com/dp/B01C2WDU78)
2M of CAN
cable (https://www.amazon.com/dp/B078VPWPKL).

Setup details
I have spliced the CAN cable to connect the PCAN-USB device via the breakout box. I measure 60 ohms across the canL and canH pins (pins 2 and 7 of the breakout, respectively).
The PCAN device has two pins marked as GND (3 and 7). I connected these to the power supply ground...is that OK? The PCAN device itself is connected via USB to my laptop so I wasn't sure where to connect this.
Any idea what can cause the distortion ? Do I need to tie the cable shielding to my power supply ground as well?


texts: I2C Communication Open drain benefits vs Push pull

texts:
I am reading this TI I2C App Note for understanding the I2C operation and need to understand how Multi master I2C will operate.

I was not able to understand this para in the app note, "Since no device may force a high on a line, this means that the bus will never
run into a communication issue where one device may try to transmit a high, and another transmits a low,
causing a short (power rail to ground). I
2C requires that if a master in a multi-master environment transmits
a high, but see's that the line is low (another device is pulling it down), to halt communications because
another device is using the bus. Push-pull interfaces do not allow for this type of freedom, which is a
benefit of I
2C.
"

This is the first para of Section 1.1 Open-Drain for Bidirectional Communication

I have some doubts :

I don't understand how they are saying Open drain is better than push pull config? Can someone give an example? And when they say two devices start communicate at the same time, how is this possible? Two devices can't communicate at the same time, right? And are the two devices slaves? or masters?
Please provide an example how push pull is dangerous when compared to Open drain in I2C?


texts: How to find the impedance of this RLC circuit?

texts:
I'm trying to find the impedance of this RLC circuit (sorry for awkward notation of Q instead of I and P instead of V due to that this scheme comes from an analogy of electrical circuits with 0D lumped models for blood flow simulations):

Due to the this circuit, we have:
$$Q_{0} - Q_{\ell} = \mathcal{C} \frac{d P_{\ell}}{dt}$$
$$P_{0} - P_{\ell} = \mathcal{L} \frac{d Q_{0}}{dt} + \mathcal{R} Q_{0}$$
Or in frequency domain:
$$\tilde{Q_{0}}(\omega) - \tilde{Q_{\ell}}(\omega) = j\omega \mathcal{C} \tilde{P_{\ell}}(\omega)$$
$$\tilde{P_{0}}(\omega) - \tilde{P_{\ell}}(\omega) = (\mathcal{R} + j\omega \mathcal{L})\tilde{Q_{0}}(\omega)$$
Or finally:
$$\tilde{P_{0}}(\omega) = (\mathcal{R} + j(\omega \mathcal{L} - \frac{1}{\omega \mathcal{C}}))\tilde{Q_{0}}(\omega) + \frac{j}{\omega\mathcal{C}} \tilde{Q_{\ell}}(\omega)$$
So, I'm stuck here cause I don't how to proceed and find the impedance. I'm not sure if it's correct to take $$\mathcal{R} + j(\omega \mathcal{L} - \frac{1}{\omega \mathcal{C}})$$ as impedance or not. Note that in my scheme I don't have any information about $$\tilde{Q_{\ell}}(\omega)$$ but I might assume that $$P_{\ell}$$ is just a constant value in time-domain (or probably a Dirac delta function in frequency domain).


texts: Is it useful to think of SMPS input capacitance as part of an LC filter?

texts:
I'm at the stage of learning about switched-mode power supplies that I'm focused on understanding the role of input capacitance. Just for background, I'm working with a buck topology for this exploration, and haven't spent any real quality time with other topologies yet, although I've read about them.

I've been building up a buck converter (nominally 10V input to 3V/300mA out) from first principles, starting with the switch (P-Channel MOSFET) dumping into a load resistor. The idea is to add components one (or sometimes it has to be two) at a time and understand the waveforms and contributions of specific components, and fix any problems before moving on. So far it's been a terrific learning experience. It turns out there's a lot that can go wrong even with one or two new components :)

Even at this early precursor stage, I soon learned the importance of input capacitance. The SRC waveform looked like this:

and thus began my learning about input capacitance, and importantly the fact that my power supply and leads contribute inductance, which gives rise to these spikes.

It turned up several questions, I'll ask others in separate posts, but along the way it occurred to me that the equivalent inductance at the input, combined with the input capacitance I added, looks an awful lot like an LC low-pass filter. Sometime after that, I read a blog comment where the author used the phrase: "... would benefit from adding resistance to the input filter ... to reduce the Q of the filter ...". Since there was no PFC or more sophisticated line reflection filter on the schematic, it caused me to wonder whether he conceived the input as a filter where the input capacitor was the C in LC.

Up until then, I'd been thinking of the input capacitor in the time domain only.

So my question is: "Does it ever make sense to think of the input capacitor (and perhaps other components) of an SMPS as part of an LC low-pass filter for the purposes of analysis?"


texts:
I'm design a board that will read current flowing trough 2 armature inside a liquid. After having create a AC signal with variable voltage and make it oscillate at 200hz i need to read the current consumption generate trough this 2 armature.

My adc can read a differential voltage from -1.5 to +1.5 VDC.
Will this schematic work? How to read correctly current? It will be +/-10mA. Will need just to make a fast acquisition and make RMS calculation?


texts: Low Power Supercapacitor LTE modem supply

texts:
I am interested in your comments about the following LTE modem power supply from a single 3.6V ER34165 battery with minimal Iq (quiescent current).

The battery can only handle 200mA continuous current at 3.6V, so I plan to use two 1F supercapacitors (e.g. HV0810-2R7105-R) in series, to support the battery during LTE transmission bursts. During LTE activity, the supply voltage must not be under 3.3V.

Since battery life time is a critical parameter and the system should stay with a total quiescent current << 10uA in sleep mode, I designed the following schematic:

"-PRECHARGE_EN" and "-HIGH_POWER_EN" are controlled by the central MCU seconds / just before the next LTE transmission. The upper transistor will be on if the ideal diodes are off and vice versa. The Schottky diode assures that the voltage will not drop below brown-out level during the switch to high power supply.

I am wondering if there is a easier solution to my problem and appreciate any comments on this.


texts: Can I decrease the width of microstrip at the pin?

texts:
I am trying to connect a 60 mil microstrip to the pin of IC. However, the width is relatively large to the space between pins on the IC. Can I decrease the width of microstrip where I connect it to the pin, so that it can be no clearance error?

In addition, when I route this microstrip to the pin, there will be a gray half circle like in the figure. Does any one know what it is? Thank you!


texts: Should I use a current limiting resistor for pins labeled as NC which should not be left floating?

texts: Playing around with the 23LC512-I/P SPI SRAM chip from Microchip, I found something strange in the datasheet (http://www.microchip.com/mymicrochip/filehandler.aspx?ddocname=en559704); on page 13, there are separate diagrams labeling pin 3 as NC in SPI and SDI mode, but a note at the bottom says pin 3 should not be left floating in SPI/SDI mode.  I expect that tying this to GND is the right way to go, but should I wire it directly, or put a resistor in line?


texts:
I have a little keyfob style remote that I want to mod. It runs on a 3 volt button cell. I want to control the three switches with an ESP8266. The switches are connected to ground, and directly to a package without any identification on it. I figure it has a pull up resistor internally. The voltage on the input pin is 3.00 volt. The output of the microcontroller is 3.3 volt.

I'm not keen on soldering 3 extra transistors to the contraption, if I can help it.

If I were to connect a gpio pin directly to the input pin of the mystery package, will the backwards current break it?
If I were to power the entire board with 3.3 volt, would that allow me to forego the transistors? It's a shame I cannot identify the package, but would those extra .3 volts usually pose a problem to IC's? I reckon it makes a difference that this board has an rf circuit on it.


texts: What is the most efficient way to invert digital signal? NPN, MOSFET, logic gate

texts:
I am designing a IoT PCB that will be powered with a Li-ion battery. I need to be really thoughtful about how much current will be drawn by the entire circuit, in order to increase battery life.
I've got 4 signals to and from the MCU that needs to go be inverted:

/CS pin of SPI communication (5MHz, 200ns period)
/INT interrupt output of a device
/SIGNAL of a pushbutton
CTRL control signal of a device

I need to invert these signals because my MCU can only be woken up from sleep by rising edge/high level GPIOs, so software inversion is not an option.
What would be the best way to invert these signal while being mindful of power consumption, size, and cost? Usign a NPN transistor? Using a N-channel MOSFET? or using a dedicated inverter logic gate chip?
Initially I designed a NPN inverter circuit with a mmbt2222 but the value of the base resistors, collector pull-up, and input pull-up or pull-down had a massive negative effect on power consumption.
Thank you all


texts: 78L05 as LM2931 replacement for powering 4XXX logic?

texts:
I'm building a project I got as PCB+panel, sourcing my own parts. It takes a clock buffered through CD40106 and runs a CD4017. The sequential outputs of the CD4017 create a programmable sequence of voltages that go to an LM358-based output stage. The full schematic can be seen here. I just realized I didn't source the LM2931, which forms the +5V line for the digital ICs. I checked the datasheet and looks like it's just a low-dropout 5V regulator rated at 100mA. Should good old 78L05 fit the bill as a replacement for just powering 4XXX logic? I'm almost sure it should be fine but thought it's better to ask. Here's the relevant part of the schematic:

Also, I thought of using a TL072 instead of the LM358 as I have plenty of these.

I have tried contacting the PCB creator with a previous project also from him, but got no reply so I think I'll get everything sorted out quicker by just asking here and making some modifications on my own.

Edit: The LM358 stage is just the usual 100k/100k summing mixer for the CD4017 outputs and then 100k/100k buffer with 15pF in the feedback path and 330R at the output jack.


texts: Spartan 6 configuration with Cypress FX2LP

texts:
I'm trying to load configuration to my FPGA board using Cypress FX2LP from USB. The basic implementation comes from Cypress's AN63620 application note, but instead Spartan 3 I use Spartan 6 (xc6slx4), and the pin layout is different for control signals. I use 8 bit bus for configuration, but because it was easier to route they are mixed from some bits on Cypress's 0-7 and 8-15 data buses. I modified the Cypress's source to load 16 bit words and wrote a host application that shuffles bits in the correct order. I checked the bus with logic analyzer, and everything seems to be fine, I can clearly see the startup sequence (0xAA 0x99 0x55 0x66 in correct bit order).

My problem is that the FPGA doesn't even starts the configuration. I think this because if I read the status register, everything is the same just as after the reset by PROG_B, every error bit is 0. I even tried to send a corrupted stream with correct start sequnece to see if I can get any error bits 1 (mainly CRC error), but I cant. They always stay 0.

I can program the FPGA with JTAG and my hello world led blinking application works (clocked from CCLK) so the FPGA should not be damaged physically. I measured all the supply voltages, they are all correct, with very little noise.

From the status register read I can see that M1=1 and M0=0, which is the correct setting for SelectMAP Slave.

I read a sentence in Spartan 6's configuration guide that I can't find in Spartan 3's: "Prior to sync word detection, the D[0:n] pins are sampled on every clock edge regardless of the state of CSI_B". Does this mean that the subsequent bytes of the synchronization word must be put on the bus on immediately after each other and it can't be paused by CSI_B? If this is the case, the GPIF interface can't be used to load the configuration (because it takes many clock cycles per byte, and the loading is gated by CSI_B). Maybe only the sequence matters, and not the timing of the sync word?

I cannot even find any example of anyone trying to configure a Spartan 6 with Cypress and SelectMAP Slave.

What could be the problem? Maybe some signal integrity problems that doesn't matters for the analyzer but for the FPGA it does?

EDIT: I solved the problem by cutting the clock line and connecting it to a GPIO of the Cypress, tied CSI_B to ground and bitbanged the same bitstream in on every single rising clock edge.


texts: Most advantageous decoupling for multiple voltages

texts:
I'm trying to figure out if I can improve the elimination of noise. I always decouple my IC's by connecting VCC and ground together with a 100nF ceramic capacitor, But I'm curious. In each picture below, assume the top battery is 2V higher than the lower battery and all batteries are fully charged. Also assume the capacitors are all electrolytic and are at least 10uF and can handle 16V. The mid-point between the two sets of batteries deliver the lower voltage that's needed.

Which of the circuits shown is the best for decoupling?

Should I follow the left-most circuit where I decouple each battery set individually?

or should I follow the middle circuit where I combine the sets together first before decoupling as if all batteries are one big voltage source?

or should I just continue to follow the last circuit where each voltage point above 0 gets grounded via a capacitor?

or should I combine any of those circuit ideas?

Also, there are no negative voltages.


texts: ultra low power mini wireless transmitter / receiver?

texts:
I'm looking for suggestions for a wireless transmitter & receiver combination.  I'm basically just trying to bridge several buttons over a wireless signal(s) (i.e. send a 1 bit signal) in as small a package as possible:

Very short range (needs to be 99% reliable at ~3 ft away, no line-of-sight).
Low power, especially for the transmitter.  I'd like to be able to send ~10,000 pulses off of a watch battery
Very small transmitter (needs to fit inside something around 1 in^3, though I have a fair bit of flexibility on placement)
Would like to prevent accidental cross-talk

Any ideas appreciated.  If interested in the reasoning, I'm trying to build a wireless Di2 system (electronic bicycle shifting)


texts: how do you model a transmission line at dc?


texts: Using P-MOSFET with Gate and Source have same voltage to protect reverse current

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I have a question when I am working on MP2639A 2-cell LIPO charger (+8V4) from USB +5V. The recommend schematic uses P-MOSFET to protect reverse current from Load back to a USB plug.

taken from MP2639A datasheet Page34

The signal /ACOK is an open-drain output signal. It will pull-low when the USB-power is OK.

From my understanding to turn-on P-MOSFET Vgs > Vgs-threshold.
However, when we use Vg and Vs have the same voltage ( +5V )
How could the USB power turn on MOSFET? even the Vgs-threshold is a negative value. If the P-MOSFET can turn on, the current that can flow from Drain to the Source is the minimum current ( near 0 )

I am not sure that I understand correctly about the P-MOSFET using in this situation


texts:
What would happen if I apply a voltage (same phase as primary) to a tertiary winding wound over the transformer core? Would the mutual flux change or would the primary draw a different value of current so as to oppose the change in flux?

(In short, would this tertiary winding act as another primary winding (injecting flux) or would it act similar to the secondary winding (seen as a load by primary))


texts: What to use as an external 100 Hz modulation source for an RF Signal Generator?

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I've got an old-school HP 8656B Signal Generator, for a 433MHz RF project.

Typically, I've used the internal 400Hz or 1kHz modulation but for the receiver in question I need a signal source that is more like 100Hz.

What would you use to generate a 100Hz external signal for my signal generator?

I've looked through the manual, and they just reference using an external source without specifying what exactly you would use.

Would you use just a generic signal generator like the Siglent Technologies SDG805, and you pulse the RF signal generator with a square wave?

Thanks,
-Tim


texts: Measurement current consumption of low power circuit

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I have a circuit which has uC, Bluetooth module and some other ICs. Current consumption of it varies between 100uA and 20mA. I want to see current waveform using oscilloscope. I worked before high current measurement(above 1Ampere) using low-side sensing technique but not so small this. How to setup a small circuit to see current values of each phase(sleep, active, transmission) separately?

Note: The circuit is powered by battery


texts: Signal Filter Shunt to GND or Virtual GND

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In the following two circuits, I am using a TLE2426 as a low impedance virtual ground to bias multiple single supply opamps/diff amps. At the output is an LRC filter, but I'm not sure whether to connect the filter capacitor to GND or virtual ground. My gut says that shunting the unwanted signal frequencies to GND directly is better and would keep them off of the virtual ground line, but I'm not sure if this is correct, or if there's really any difference. Performance-wise I can't distinguish a difference. Which of the two options is better?

Option 1:

Option 2:


texts:
3.29(b)
I solved this and got Vout = Vin - (Vb - Vd) when diode with Vb is conducting and got Vout = (Vin - 0.8)R2 / (R1 + R2) when upper diode was conducting but unable to find the output voltage when both of them are conducting.

Can someone please help me out?


texts:
The DC Load Line is simple to explain, for a given circuit the relation between VCE and IC must comply to the KVL relationship for that circuit.

In the graph we can choose a Q point, and then see if we superimpose an AC signal on top of the DC voltage then the VC will follow accordingly, and we can determine the maximum output swing.

The AC Load Line confuses me however. Because when I determine this line using the AC equivalent circuit model and KVL across the vce loop, the load line now goes through zero on a graph.

  ic = - vce / (RC // RL)

Then I understand to get the true load line of the circuit, I must superimpose the AC Load line on the Q point, and preferably use the middle of the AC LL as the Q point.

I then get this:

Does this mean the DC LL no longer stands?
How did we get the Imax and Vmax of the AC LL?
And how do I determine the Q point to be in the middle of the AC LL?

Thanks


texts: How can I figure out an unknown UART's speed?

texts:
So I have a piece of hardware I'm reverse engineering. I believe I've found a UART on the board. I have an FPGA connected to it that just does:

ExtTX <= PCRX;
PCTX <= ExtRX;

So, in this way I can theoretically handle any speed the FTDI on my FPGA can(which is fairly fast). So, I have the hardware portion covered. Now though, using Linux(or Windows), how can I figure out what the speed and stop bits and other configuration options of the serial connection should be?


texts: In the AT42QT1245 touch sensor controller, how do the buttons wire to the device?

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Referring to the datasheet wiring diagram, page 4 here: https://www.mouser.com/datasheet/2/268/Atmel-9632-AT42-QT1245_Datasheet-1368898.pdf
It simply says "Matrix X Drive" and "Matrix Y Scan In". Could someone clarify where exactly the touch buttons would connect to what pins, and if a diode is necessary where it would be placed?
The capacitive buttons only have a single pin. If I'm correct, button 1 would connect to X0 and Y0A, button 2 to X1 and Y0A, etc. But I can't say for certain how things are to be wired properly and to prevent issues if multiple buttons are pressed at once.


texts: Why put a voltage divider between a battery and the battery pin of an RTC?

texts:
I bought a PCB module including a DS1307 real-time clock to evaluate if that RTC is right for the system I'm designing.

Here's part of the schematic:

The DS1307 works with a battery voltage between 2 V and 3.5 V. I use the module with a 3 V coin cell battery.

Resistors R37 and R38 make a voltage divider that turn the 3 V of the battery in about 2.5 V, and feed such voltage to the VBAT pin of the DS1307 real-time clock.

What's the use of such voltage divider? Why not connect the 3 V battery directly to the VBAT pin?

EDIT: I added the 5 V flag to the voltage live on the top of the picture.


texts: Sensor Linearization wit Operational Amplifier

texts:
The folloing circuit is used with for linearisation of sensors, where UE is input voltage (from a sensor) and UA is output voltage

How does this circuit work to fulfill its purpose? You may consider all ellements ideal for the simplicity of explanation.


texts: Problem with capacitor after bridge rectifier

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I wanted to make a simple power supply so I made a bridge rectifier with 4 diodes rated 6 amps, then I connected the bridge to a transformer (220 volts to 9 volts (measured 9.4 with voltmeter) 50 Hz) and when I measured the voltage after the bridge the output was 9.1 volts.

Then I added a 4700uF capacitor (50 volts) in parallel and when I measured the output voltage it was 13.8 volts but when I disconnect it, voltage is 9 volts again. I first thought that maybe the voltmeter is broken but when tested with an small motor it was actually running faster with the cap.

Is it pulling more pressure on the transformer to draw 13 volts or something? Because I'm really confused right now. By the way will it help if I use an smaller cap? Because that would increase the ripple voltage?