ADI2005/spice-circuits-finetune-v3

SPICE Circuits Fine-Tune V3

A high-quality instruction-following dataset for fine-tuning language models to generate valid, simulation-ready SPICE netlists from natural language descriptions.

Dataset Summary

Property	Value
Total entries	12,471
Format	{"instruction": "...", "output": "..."}
PySpice validation	100% pass
ngspice simulation	99.2% pass (500-entry spot check)
Filepath leaks	0
License	Apache 2.0

What Makes V3 Different

Spec-to-value accuracy. Component values are computed deterministically from the target specification using engineering formulas — not picked arbitrarily. If an instruction says "cutoff at 1kHz", the netlist has C = 1/(2π×R×fc) calculated exactly. If the instruction says "gain = 20", the feedback resistor satisfies Rf = gain × Rin exactly.

Dual validation. Every entry passes both PySpice structural parsing (syntax and connectivity) and ngspice .op or .ac simulation (actual circuit behavior). Entries referencing LTspice-only proprietary models are excluded.

Compound instructions. Every circuit family includes multi-specification instruction variants — e.g., "Design with VCC=12V, IC=2mA, hFE=150, voltage divider bias with 10x rule, and AC sweep from 10Hz to 100MHz."

Zero filepath contamination. All real-world entries are cleaned of filepath comment lines before inclusion.

Circuit Families Covered (27 families)

Family	Count
BJT CE Amplifier	1,304
Current Mirror (Simple/PMOS/Wilson/BJT)	1,381
RC High-Pass Filter	743
Cascode Amplifier (NMOS + BJT)	737
RC Low-Pass Filter	734
RLC Bandpass Filter	708
Op-Amp Configs (inv, non-inv, diff, comp)	1,621
LDO Regulator	530
CMOS Gates (inverter, NAND, NOR)	800
Differential Pair (NMOS + PMOS + BJT)	515
Source-Degenerated NMOS	388
Zener Regulator	320
Op-Amp Integrator / Differentiator	352
Two-Stage Miller Op-Amp	181
Wien Bridge Oscillator	135
Bridge Rectifier	120
Common-Base BJT	96
Colpitts Oscillator	84
Common-Gate NMOS	79
MOSFET Switch	50
Other / Real V2 cleaned	1,593

Data Format

Each entry is a JSON object with two fields:

{
  "instruction": "Design a low-pass RC filter with cutoff at 1kHz. Use R=10kΩ and calculate C to achieve exactly this cutoff.",
  "output": "* RC Low-Pass Filter — fc = 1kHz\nVIN IN 0 DC 0 AC 1\nR1 IN OUT 10k\nC1 OUT 0 15.92n\n.ac dec 50 10 100k\n.end"
}

Formulas Implemented

Circuit	Formula
RC / Sallen-Key filter	C = 1 / (2π × R × fc)
RLC bandpass	f0 = 1/(2π√LC), Q = f0·L/R
BJT voltage divider bias	R2 = VB/(10·IB), R1 = (VCC−VB)/(11·IB)
BJT CE voltage gain	RC = Av × re, re = 26mV / IC
Inverting op-amp gain	Rf = gain × Rin
Non-inverting op-amp gain	Rf = (gain − 1) × Rg
Integrator / differentiator	τ = R × C
LDO feedback	Vout = Vref × (1 + R1/R2)
Colpitts oscillator	f = 1/(2π√(L × Ceq))

Usage

from datasets import load_dataset

ds = load_dataset("ADI2005/spice-circuits-finetune-v3", split="train")
print(ds[0])

Fine-tuning format (Alpaca-style)

def format_entry(entry):
    return (
        f"### Instruction:\n{entry['instruction']}\n\n"
        f"### Response:\n{entry['output']}"
    )

Version History

Version	Entries	Key Improvement
V1	~1,000	Initial real SPICE netlists
V2	~3,000	Cleaned real data + basic synthetic
V3	12,471	Deterministic formulas, ngspice verification, 27 families, compound instructions

Related

• Model fine-tuned on this dataset: ADI2005/qwen-spice-lora-v2
• Base model: Qwen/Qwen2.5-Coder-3B-Instruct